Design challenges for prototypical and emerging memory concepts relying on resistance switching. - Christophe Muller; Damien Deleruyelle; Olivier Ginez; Jean-Michel Portal; Marc Bocquet (CICC, 2011)

Crossbar architecture based on 2R complementary resistive switching memory cell. - Weisheng Zhao; Yue Zhang 010; Jacques-Olivier Klein; Damien Querlioz; Djaafar Chabi; Dafine Ravelosona; Claude Chappert; Jean-Michel Portal; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; Christophe Muller (NANOARCH, 2012)

Non-Volatile Flip-Flop Based on Unipolar ReRAM for Power-Down Applications. - Jean-Michel Portal; Marc Bocquet; Damien Deleruyelle; Christophe Muller (J. Low Power Electron., 2012)

Analytical study of complementary memristive synchronous logic gates. - Jean-Michel Portal; Mathieu Moreau; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; Christophe Muller; Yue Zhang 010; Erya Deng; Jacques-Olivier Klein; Damien Querlioz; Dafine Ravelosona; Claude Chappert; et al. (NANOARCH, 2013)

Synchronous full-adder based on complementary resistive switching memory cells. - Yue Zhang 010; Erya Deng; Jacques-Olivier Klein; Damien Querlioz; Dafine Ravelosona; Claude Chappert; Weisheng Zhao; Mathieu Moreau; Jean-Michel Portal; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; et al. (NEWCAS, 2013)

Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells. - Weisheng Zhao; Jean-Michel Portal; Wang Kang 001; Mathieu Moreau; Yue Zhang 010; Hassen Aziza; Jacques-Olivier Klein; Zhaohao Wang; Damien Querlioz; Damien Deleruyelle; Marc Bocquet; Dafine Ravelosona; et al. (J. Parallel Distributed Comput., 2014)

Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. - Weisheng Zhao; Mathieu Moreau; Erya Deng; Yue Zhang 010; Jean-Michel Portal; Jacques-Olivier Klein; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; Christophe Muller; Damien Querlioz; Nesrine Ben Romdhane; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Ge-Se-Sb-N-based OTS scaling perspectives for high-density 1 S1R crossbar arrays. - Joel Minguet Lopez; Niccolo Castellani; Laurent Grenouillet; Lucas Reganaz; Gabriele Navarro; Mathieu Bernard; Catherine Carabasse; Thomas Magis; Damien Deleruyelle; Marc Bocquet; Jean-Michel Portal; Etienne Nowak; et al. (IMW, 2021)

Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization. - Joel Minguet Lopez; Lucas Hudeley; Laurent Grenouillet; Diego Alfaro Robayo; Jury Sandrini; Gabriele Navarro; Mathieu Bernard; Catherine Carabasse; Damien Deleruyelle; Niccolo Castellani; Marc Bocquet; Jean-Michel Portal; et al. (IRPS, 2021)

1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing. - Joel Minguet Lopez; François Rummens; Lucas Reganaz; A. Heraud; Tifenn Hirtzlin; Laurent Grenouillet; Gabriele Navarro; Mathieu Bernard; Catherine Carabasse; Niccolo Castellani; Valentina Meli; S. Martin; et al. (IMW, 2022)

High temperature stability embedded ReRAM for 2x nm node and beyond. - Gabriel Molas; Giuseppe Piccolboni; Alessandro Bricalli; Anthonin Verdy; I. Naot; Y. Cohen; Amir Regev; I. Naveh; Damien Deleruyelle; Quentin Rafhay; Niccolo Castellani; Lucas Reganaz; et al. (IMW, 2022)

Energy-efficient Computation-In-Memory Architecture using Emerging Technologies. - Rajendra Bishnoi; Sumit Diware; Anteneh Gebregiorgis; Simon Thomann; Sara Mannaa; Bastien Deveautour; Cédric Marchand 002; Alberto Bosio; Damien Deleruyelle; Ian O'Connor; Hussam Amrouch; Said Hamdioui (ICM, 2023)

Investigation of resistance fluctuations in ReRAM: physical origin, temporal dependence and impact on memory reliability. - Lucas Reganaz; Damien Deleruyelle; Quentin Rafhay; Joel Minguet Lopez; Niccolo Castellani; Jean-François Nodin; Alessandro Bricalli; Giuseppe Piccolboni; Gabriel Molas; François Andrieu (IRPS, 2023)

1S1R Sub-Threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation. - Joel Minguet Lopez; Manon Dampfhoffer; Tifenn Hirtzlin; Lucas Reganaz; Laurent Grenouillet; Gabriele Navarro; Mathieu Bernard; Thomas Magis; Catherine Carabasse; Niccolo Castellani; Valentina Meli; Elisa Vianello; et al. (MIXDES, 2023)

FVLLMONTI: The 3D Neural Network Compute Cube $(N^{2}C^{2})$ Concept for Efficient Transformer Architectures Towards Speech-to-Speech Translation. - Ian O'Connor; Sara Mannaa; Alberto Bosio; Bastien Deveautour; Damien Deleruyelle; Tetiana Obukhova; Cédric Marchand 002; Jens Trommer; Çigdem Çakirlar; Bruno Neckel Wesling; Thomas Mikolajick; Oskar Baumgartner; et al. (DATE, 2024)

3D VNWFET-Based Standard Cell Library Design Flow: from Circuit and Physical Design to Logic Synthesis. - Sara Mannaa; Cédric Marchand 002; Damien Deleruyelle; Bastien Deveautour; Alberto Bosio; Christoph Lenz; Oskar Baumgartner; Ian O'Connor (VLSI-SoC, 2024)