Scheduling semiconductor lines using a fluid network model. - Dan Connors; Gerry Feigin; David D. Yao (IEEE Trans. Robotics Autom., 1994)

Architectural Support for Compiler-Synthesized Dynamic Branch Prediction Strategies: Rationale and Initial Results. - David I. August; Daniel A. Connors; John C. Gyllenhaal; Wen-mei W. Hwu (HPCA, 1997)

Run-Time Adaptive Cache Management. - Teresa L. Johnson; Daniel A. Connors; Wen-mei W. Hwu (HICSS (7), 1998)

Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture. - David I. August; Daniel A. Connors; Scott A. Mahlke; John W. Sias; Kevin M. Crozier; Ben-Chung Cheng; Patrick R. Eaton; Qudus B. Olaniran; Wen-mei W. Hwu (ISCA, 1998)

Compiler-Directed Early Load-Address Generation. - Ben-Chung Cheng; Daniel A. Connors; Wen-mei W. Hwu (MICRO, 1998)

An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors. - Daniel A. Connors; Jean-Michel Puiatti; David I. August; Kevin M. Crozier; Wen-mei W. Hwu (Euro-Par, 1999)

The Program Decision Logic Approach to Predicated Execution. - David I. August; John W. Sias; Jean-Michel Puiatti; Scott A. Mahlke; Daniel A. Connors; Kevin M. Crozier; Wen-mei W. Hwu (ISCA, 1999)

Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results. - Daniel A. Connors; Wen-mei W. Hwu (MICRO, 1999)

Run-Time Cache Bypassing. - Teresa L. Johnson; Daniel A. Connors; Matthew C. Merten; Wen-mei W. Hwu (IEEE Trans. Computers, 1999)

Architecture. - Daniel A. Connors; Wen-mei W. Hwu (The VLSI Handbook, 1999)

Hardware Support for Dynamic Management of Compiler-Directed Computation Reuse. - Daniel A. Connors; Hillery C. Hunter; Ben-Chung Cheng; Wen-mei W. Hwu (ASPLOS, 2000)

Eliminating Dynamic Computation Redundancy - Daniel A. Connors (2000)

Compiler-Directed Resource Management for Active Code Regions. - Ravikrishnan Sree; Alex Settle; Ian Bratt; Daniel A. Connors (Interaction between Compilers and Computer Architectures, 2003)

Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures. - Hassan Al-Sukhni; Ian Bratt; Daniel A. Connors (IEEE PACT, 2003)

Optimization for the Intel® Itanium ®Architectur Register Stack. - Alex Settle; Daniel A. Connors; Gerolf Hoflehner; Daniel M. Lavery (CGO, 2003)

The analysis and design of architecture systems for speech recognition on modern handheld-computing devices. - Andreas Hagen; Daniel A. Connors; Bryan L. Pellom (CODES+ISSS, 2003)

Architectural Support for Enhanced SMT Job Scheduling. - Alex Settle; Joshua L. Kihm; Andrew Janiszewski; Daniel A. Connors (IEEE PACT, 2004)

A VFSA Scheduler for Radiative Transfer Data in Climate Models. - Stefan P. Muszala; Gita Alaghband; Daniel A. Connors; James J. Hack (PDCS, 2004)

Predictable Fine-Grained Cache Behavior for Enhanced Simultaneous Multithreading (SMT) Scheduling. - Joshua L. Kihm; Andrew Janiszewski; Daniel A. Connors (CCCT (1), 2004)

Implementation of Fine-Grained Cache Monitoring for Improved SMT Scheduling. - Joshua L. Kihm; Daniel A. Connors (ICCD, 2004)

PIN: a binary instrumentation tool for computer architecture research and education. - Vijay Janapa Reddi; Alex Settle; Daniel A. Connors; Robert S. Cohn (WCAE, 2004)

Analysis of path profiling information generated with performance monitoring hardware. - Alex Shye; Matthew Iyer; Tipp Moseley; David Hodgdon; Dan Fay; Vijay Janapa Reddi; Daniel A. Connors (Interaction between Compilers and Computer Architectures, 2005)

Code coverage testing using hardware performance monitoring support. - Alex Shye; Matthew Iyer; Vijay Janapa Reddi; Daniel A. Connors (AADEBUG, 2005)

Dynamic run-time architecture techniques for enabling continuous optimization. - Tipp Moseley; Alex Shye; Vijay Janapa Reddi; Matthew Iyer; Dan Fay; David Hodgdon; Joshua L. Kihm; Alex Settle; Dirk Grunwald; Daniel A. Connors (Conf. Computing Frontiers, 2005)

Methods for Modeling Resource Contention on Simultaneous Multithreading Processors. - Tipp Moseley; Dirk Grunwald; Joshua L. Kihm; Daniel A. Connors (ICCD, 2005)

Analysis of Hardware Acceleration in Reconfigurable Embedded Systems. - Matthew Ouellette; Daniel A. Connors (IPDPS, 2005)

Statistical Simulation of Multithreaded Architectures. - Joshua L. Kihm; Daniel A. Connors (MASCOTS, 2005)

A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. - Qiang Wu; Margaret Martonosi; Douglas W. Clark; Vijay Janapa Reddi; Dan Connors; Youfeng Wu; Jin Lee; David M. Brooks (MICRO, 2005)

Understanding the Impact of Inter-Thread Cache Interference on ILP in Modern SMT Processors. - Joshua L. Kihm; Alex Settle; Andrew Janiszewski; Dan Connors (J. Instr. Level Parallelism, 2005)

Persistence in dynamic code transformation systems. - Vijay Janapa Reddi; Dan Connors; Robert S. Cohn (SIGARCH Comput. Archit. News, 2005)

Chip multi-processor scalability for single-threaded applications. - Neil Vachharajani; Matthew Iyer; Chinmay Ashok; Manish Vachharajani; David I. August; Daniel A. Connors (SIGARCH Comput. Archit. News, 2005)

Exploiting parallelism and structure to accelerate the simulation of chip multi-processors. - David A. Penry; Daniel Fay; David Hodgdon; Ryan Wells; Graham Schelle; David I. August; Dan Connors (HPCA, 2006)

Improved stride prefetching using extrinsic stream characteristics. - Hassan Al-Sukhni; James Holt; Daniel A. Connors (ISPASS, 2006)

A dynamically reconfigurable cache for multithreaded processors. - Alex Settle; Dan Connors; Enric Gibert; Antonio González 001 (J. Embed. Comput., 2006)

Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. - Qiang Wu; Margaret Martonosi; Douglas W. Clark; Vijay Janapa Reddi; Dan Connors; Youfeng Wu; Jin Lee; David M. Brooks (IEEE Micro, 2006)

An Adaptive Fault-Tolerant Memory System for FPGA-based Architectures in the Space Environment. - Dan Fay; Alex Shye; Sayantan Bhattacharya; Daniel A. Connors; Steve Wichmann (AHS, 2007)

Identifying potential parallelism via loop-centric profiling. - Tipp Moseley; Daniel A. Connors; Dirk Grunwald; Ramesh Peri (Conf. Computing Frontiers, 2007)

Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications. - Vijay Janapa Reddi; Dan Connors; Robert Cohn; Michael D. Smith 001 (CGO, 2007)

Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance. - Alex Shye; Tipp Moseley; Vijay Janapa Reddi; Joseph Blomstedt; Daniel A. Connors (DSN, 2007)

Phase-Guided Small-Sample Simulation. - Joshua L. Kihm; Samuel D. Strom; Daniel A. Connors (ISPASS, 2007)

Teaching Fault Tolerant FPGA Design for Aerospace Applications. - Dan Fay; Scott Campbell; Greg Miller; Dan Connors (MSE, 2007)

Optimizing consistency checking for memory-intensive transactions. - Justin Emile Gottschlich; Daniel A. Connors (PODC, 2008)

An efficient lock-aware transactional memory implementation. - Justin Emile Gottschlich; Jeremy G. Siek; Manish Vachharajani; Dwight Y. Winkler; Daniel A. Connors (ICOOOLPS@ECOOP, 2009)

Hardware-compiler co-design for adjustable data power savings. - Hillery C. Hunter; Erik M. Nystrom; Daniel A. Connors; Wen-mei W. Hwu (Microprocess. Microsystems, 2009)

PLR: A Software Approach to Transient Fault Tolerance for Multicore Architectures. - Alex Shye; Joseph Blomstedt; Tipp Moseley; Vijay Janapa Reddi; Daniel A. Connors (IEEE Trans. Dependable Secur. Comput., 2009)

OE+IOE: a novel turn model based fault tolerant routing scheme for networks-on-chip. - Sudeep Pasricha; Yong Zou 001; Dan Connors; Howard Jay Siegel (CODES+ISSS, 2010)

Modeling Ion Channel Kinetics with HPC. - Allison Gehrke; Katherine Rennie; Timothy Benke; Daniel A. Connors; Ilkyeun Ra (HPCC, 2010)

A Framework for Automated Performance Tuning and Code Verification on GPU Computing Platforms. - Allison Gehrke; Ilkyeun Ra; Daniel A. Connors (IPDPS Workshops, 2011)

Natural Load Indices (NLI) for scientific simulation. - Stefan P. Muszala; Gita Alaghband; James J. Hack; Daniel A. Connors (J. Supercomput., 2012)

Exploring alternative flexible OpenCL (FlexCL) core designs in FPGA-based MPSoC systems. - Dan Connors; Eric Grover; Blake Caldwell (RAPIDO, 2013)

Data-driven techniques to overcome workload disparity. - Dan Connors; Skyler Saleh; Tejas Joshi; Ryan Bueter (IA3@SC, 2014)

PyCompArch: python-based modules for exploring computer architecture concepts. - Dan Connors; Kyle Dunn; Ryan Bueter (WCAE, 2015)