Implementation of Ternary Circuits with Binary Integrated Circuits. - Daniel Etiemble; Michel Israël (IEEE Trans. Computers, 1977)

TTL circuits for a 4-valued bus a way to reduce package and interconnections. - Daniel Etiemble (MVL, 1978)

Multivalued I2L Circuits for TSC Checkers. - Daniel Etiemble (IEEE Trans. Computers, 1980)

Micro-computer oriented algorithms for delay evaluation of MOS gates. - Daniel Etiemble; V. Adeline; Nguyen H. Duyet; J. C. Ballegeer (DAC, 1984)

The Database Processor 'RAPID'. - Pascal Faudemay; Daniel Etiemble; Jean-Luc Béchennec; He Hé (IWDM, 1987)

A highly parallel processor with an instruction set including relational algebra. - Pascal Faudemay; Daniel Etiemble; Jean-Luc Béchennec (ICCD, 1988)

Comparison of Binary and Multivalued ICs According to VLSI Criteria. - Daniel Etiemble; Michel Israël (Computer, 1988)

4-Valued BiCMOS Circuits for the Transmission System of a Massively Parallel Architecture. - Daniel Etiemble; Christophe Chanussot; Vincent Néri (ISMVL, 1990)

A risc central processing unit for a massivelly parallel architecture. - Franck Cappello; Jean-Luc Béchennec; Daniel Etiemble (Microprocessing and Microprogramming, 1990)

3D hardware packages for parallel architectures. - Jean-Luc Béchennec; Franck Cappello; Daniel Etiemble (Microprocessing and Microprogramming, 1991)

On the Performance of Multivalued Integrated Circuits: Past, Present and Future. - Daniel Etiemble (ISMVL, 1992)

Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system. - Daniel Etiemble; Keivan Navi (IEEE Symposium on Computer Arithmetic, 1993)

Balanced Distributed Memory Parallel Computers. - Franck Cappello; Jean-Luc Béchennec; Franck Delaplace; Cécile Germain; Jean-Louis Giavitto; Vincent Néri; Daniel Etiemble (ICPP (1), 1993)

A Basis for the Comparison of Binary and m-Valued Current Mode Circuits: the Multioperand Addition with Redundant Number Systems. - Daniel Etiemble; Keivan Navi (ISMVL, 1993)

A Parralel Architecture Based on Compiled Communication Schemes. - Franck Cappello; Jean-Luc Béchennec; Franck Delaplace; Damien Gautier de Lahaut; Cécile Germain; Jean-Louis Giavitto; Vincent Néri; Daniel Etiemble (PARCO, 1993)

A Communication Architecture for a Massively Parallel Message-Passing Multicomputer. - Cécile Germain; Jean-Luc Béchennec; Daniel Etiemble; Jean-Paul Sansonnet (J. Parallel Distributed Comput., 1993)

Hardware features of the static communication network of a parallel architecture. - Vincent Néri; Jean-Luc Béchennec; Franck Cappello; Daniel Etiemble (Microprocess. Microprogramming, 1993)

CML Current Mode Full Adders for 2.5-V Power Supply. - A. Kazeminejad; Keivan Navi; Daniel Etiemble (ISMVL, 1994)

Performance of CMOS Current Mode Full Adders. - Keivan Navi; A. Kazeminejad; Daniel Etiemble (ISMVL, 1994)

Parallel architecture and language in Europe. - Daniel Etiemble; Jean-Claude Syre (Future Gener. Comput. Syst., 1994)

From Multi-Valued Current Mode CMOS Circuits to Efficient Voltage Mode CMOS Arithmetic Operators. - Keivan Navi; Daniel Etiemble (ISMVL, 1995)

Standard Microprocessors Versus Custom Processing Elements for Massively Parallel Architectures. - Daniel Etiemble; Cécile Germain (PaCT, 1995)

Complete x86 instruction trace generation from hardware bus collect. - P. Bosch; A. Carloganu; Daniel Etiemble (EUROMICRO, 1997)

Performance evaluation of the memory hierarchy of a desktop PC using commodity chips with specific traces. - A. Pavlov; Jean-Luc Béchennec; Daniel Etiemble (EUROMICRO, 1997)

Communications in Parallel Architectures and Networks of Workstations: From Standardisation to New Standards. - Franck Cappello; Daniel Etiemble (PaCT, 1997)

An HPF Case Study of a Domain-Decomposition Based Irregular Application. - Cécile Germain; Jacques Laminie; Marie Pallud; Daniel Etiemble (PaCT, 1997)

Performance of the NAS Benchmarks on a Cluster of SMP PCs Using a Parallelization of the MPI Programs with OpenMP. - Franck Cappello; Olivier Richard; Daniel Etiemble (PaCT, 1999)

Performance Evaluation of Two Programming Models for a Cluster of PC Biprocessors. - Franck Cappello; Olivier Richard; Daniel Etiemble (PDPTA, 1999)

Investigating the Performance of Two Programming Models for Clusters of SMP PCs. - Franck Cappello; Olivier Richard; Daniel Etiemble (HPCA, 2000)

MPI versus MPI+OpenMP on IBM SP for the NAS Benchmarks. - Franck Cappello; Daniel Etiemble (SC, 2000)

Understanding performance of SMP clusters running MPI programs. - Franck Cappello; Olivier Richard; Daniel Etiemble (Future Gener. Comput. Syst., 2001)

Numerical Applications and Sub-Word Parallelism: The NAS Benchmarks on a Pentium 4. - Daniel Etiemble (HPCS, 2002)

Optimizing DSP and media benchmarks for Pentium 4: hardware and software issues. - Daniel Etiemble (ICME (2), 2002)

Computer arithmetic and hardware: "off the shelf" microprocessors versus "custom hardware". - Daniel Etiemble (Theor. Comput. Sci., 2002)

MPI ou MPI+OpenMP sur grappes de multiprocesseurs? - Franck Cappello; Daniel Etiemble (Tech. Sci. Informatiques, 2002)

Why M-Valued Circuits are Restricted to a Small Niche. - Daniel Etiemble (J. Multiple Valued Log. Soft Comput., 2003)

16-Bit FP Sub-Word Parallelism to Facilitate Compiler Vectorization and Improve Performance of Image and Media Processing. - Daniel Etiemble; Lionel Lacassagne (ICPP, 2004)

16-bit Floating Point Instructions for Embedded Multimedia Applications. - Lionel Lacassagne; Daniel Etiemble; S. A. Ould Kablia (CAMP, 2005)

Customizing 16-bit FP Instructions on a NIOS II Processor for FPGA Image and Media Processing. - Daniel Etiemble; Samir Bouaziz; Lionel Lacassagne (ESTIMedia, 2005)

Des flottants 16 bits sur microprocesseurs d'usage général pour images et multimédia. - Daniel Etiemble; Lionel Lacassagne (Tech. Sci. Informatiques, 2005)

Algorithmic Skeletons within an Embedded Domain Specific Language for the CELL Processor. - Tarik Saidani; Joel Falcou; Claude Tadonki; Lionel Lacassagne; Daniel Etiemble (PACT, 2009)

Towards a parameterizable cycle-accurate ISS in ArchC. - Charly Bechara; Nicolas Ventroux; Daniel Etiemble (AICCSA, 2010)

Comparison of Different Thread Scheduling Strategies for Asymmetric Chip MultiThreading Architectures in Embedded Systems. - Charly Bechara; Nicolas Ventroux; Daniel Etiemble (DSD, 2011)

AHDAM: An Asymmetric Homogeneous with Dynamic Allocator Manycore Chip. - Charly Bechara; Nicolas Ventroux; Daniel Etiemble (Facing the Multicore-Challenge, 2011)

A small footprint interleaved multithreaded processor for embedded systems. - Charly Bechara; Aurelien Berhault; Nicolas Ventroux; Stéphane Chevobbe; Yves Lhuillier; Raphaël David; Daniel Etiemble (ICECS, 2011)

Automatic color space switching for robust tracking. - Florence Laguzet; Michèle Gouiffès; Lionel Lacassagne; Daniel Etiemble (ICSIPA, 2011)

Parallel Biological Sequence Comparison on Heterogeneous High Performance Computing Platforms with BSP++. - Khaled Hamidouche; Fernando Machado Mendonca; Joël Falcou; Daniel Etiemble (SBAC-PAD, 2011)

A framework for an automatic hybrid MPI+OpenMP code generation. - Khaled Hamidouche; Joel Falcou; Daniel Etiemble (SpringSim (HPC), 2011)

High Performance SoC Design Using Magnetic Logic and Memory. - Weisheng Zhao; Lionel Torres; Luis Vitório Cargnini; Raphael Martins Brum; Yue Zhang 010; Yoann Guillemenet; Gilles Sassatelli; Yahya Lakys; Jacques-Olivier Klein; Daniel Etiemble; Dafine Ravelosona; Claude Chappert (VLSI-SoC (Selected Papers), 2011)

Embedded MRAM for high-speed computing. - Weisheng Zhao; Yue Zhang 010; Yahya Lakys; Jacques-Olivier Klein; Daniel Etiemble; D. Revelosona; Claude Chappert; Lionel Torres; Luis Vitório Cargnini; Raphael Martins Brum; Yoann Guillemenet; Gilles Sassatelli (VLSI-SoC, 2011)

Impact of high level transforms on high level synthesis for motion detection algorithm. - H. Ye; Lionel Lacassagne; Daniel Etiemble; Laurent Cabaret; Joel Falcou; Andrés Romero Mier y Terán; Olivier Florent (DASIP, 2012)

High level tranforms toreduce energy consumption of signal and image processing operators. - H. Ye; Lionel Lacassagne; Joël Falcou; Daniel Etiemble; Laurent Cabaret; Olivier Florent (PATMOS, 2013)

Parallel Smith-Waterman Comparison on Multicore and Manycore Computing Platforms with BSP++. - Khaled Hamidouche; Fernando Machado Mendonca; Joel Falcou; Alba Cristina Magalhaes Alves de Melo; Daniel Etiemble (Int. J. Parallel Program., 2013)

High level transforms for SIMD and low-level computer vision algorithms. - Lionel Lacassagne; Daniel Etiemble; Ali Hassan Zahraee; Alain Dominguez; Pascal Vezolle (WPMVP@PPoPP, 2014)

Parallel light speed labeling: An efficient connected component labeling algorithm for multi-core processors. - Laurent Cabaret; Lionel Lacassagne; Daniel Etiemble (ICIP, 2015)

Color tracking with contextual switching: real-time implementation on CPU. - Florence Laguzet; Andrés Romero Mier y Terán; Michèle Gouiffès; Lionel Lacassagne; Daniel Etiemble (J. Real Time Image Process., 2015)

A new SIMD iterative connected component labeling algorithm. - Lionel Lacassagne; Laurent Cabaret; Daniel Etiemble; Farouk Hebache; Andrea Petreto (WPMVP@PPoPP, 2016)

Automatic Task-Based Code Generation for High Performance Domain Specific Embedded Language. - Antoine Tran Tan; Joel Falcou; Daniel Etiemble; Hartmut Kaiser (Int. J. Parallel Program., 2016)

Distanceless label propagation: An efficient direct connected component labeling algorithm for GPUs. - Laurent Cabaret; Lionel Lacassagne; Daniel Etiemble (IPTA, 2017)

45-year CPU evolution: one law and two equations. - Daniel Etiemble (CoRR, 2018)

Parallel Light Speed Labeling: an efficient connected component algorithm for labeling and analysis on multi-core processors. - Laurent Cabaret; Lionel Lacassagne; Daniel Etiemble (J. Real Time Image Process., 2018)

Evolution of Technologies and Multivalued Circuits. - Daniel Etiemble (CoRR, 2019)

Coprocessors: failures and successes. - Daniel Etiemble (CoRR, 2019)

Ternary circuits: why R=3 is not the Optimal Radix for Computation. - Daniel Etiemble (CoRR, 2019)

Comparing ternary and binary adders and multipliers. - Daniel Etiemble (CoRR, 2019)

Comments on "High-Performance and Energy-Efficient CNFET-Based Designs for Ternary Logic Circuits". - Daniel Etiemble (IEEE Access, 2020)

Best implementations of quaternary adders. - Daniel Etiemble (CoRR, 2020)

Comparing quaternary and binary multipliers. - Daniel Etiemble (CoRR, 2020)

Multivalued circuits and Interconnect issues. - Daniel Etiemble (CoRR, 2020)

Best CNTFET Ternary Adders? - Daniel Etiemble (CoRR, 2021)

Technologies and Computing Paradigms: Beyond Moore's law? - Daniel Etiemble (CoRR, 2022)

CNTFET quaternary multipliers are less efficient than the corresponding binary ones. - Daniel Etiemble (CoRR, 2022)

Two New CNTFET Quaternary Full Adders for Carry-Propagate Adders. - Daniel Etiemble (CoRR, 2022)

Ternary and Quaternary CNTFET Full Adders are less efficient than the Binary Ones for Carry-Propagate Adders. - Daniel Etiemble (CoRR, 2022)

Optical flow algorithms optimized for speed, energy and accuracy on embedded GPUs. - Thomas Romera; Andrea Petreto; Florian Lemaitre; Manuel Bouyer; Quentin L. Meunier; Lionel Lacassagne; Daniel Etiemble (J. Real Time Image Process., 2023)