Time-variant decision support systems. - Daniel Geist; Yuval Lirov (SMC, 1989)

PC-based 3-D reconstruction of medical images. - Daniel Geist; Michael W. Vannier (Comput. Graph., 1989)

Adjacency of the 0-1 knapsack problem. - Daniel Geist; Ervin Y. Rodin (Comput. Oper. Res., 1992)

Methodology and System for Practical Formal Verification of Reactive Hardware. - Ilan Beer; Shoham Ben-David; Daniel Geist; Raanan Gewirtzman; Michael Yoeli (CAV, 1994)

Efficient Model Checking by Automated Ordering of Transition Relation Partitions. - Daniel Geist; Ilan Beer (CAV, 1994)

AVPGEN-A test generator for architecture verification. - Ashok K. Chandra; Vijay S. Iyengar; D. Jameson; R. V. Jawalekar; Indira Nair; Barry K. Rosen; Michael P. Mullen; J. Yoon; R. Armoni; Daniel Geist; Yaron Wolfsthal (IEEE Trans. Very Large Scale Integr. Syst., 1995)

Coverage-Directed Test Generation Using Symbolic Techniques. - Daniel Geist; Monica Farkas; Avner Landver; Yossi Lichtenstein; Shmuel Ur; Yaron Wolfsthal (FMCAD, 1996)

RuleBase: Model Checking at IBM. - Ilan Beer; Shoham Ben-David; Cindy Eisner; Daniel Geist; Leonid Gluhovsky; Tamir Heyman; Avner Landver; P. Paanah; Yoav Rodeh; G. Ronin; Yaron Wolfsthal (CAV, 1997)

"Have I written enough Properties?" - A Method of Comparison between Specification and Implementation. - Sagi Katz; Orna Grumberg; Daniel Geist (CHARME, 1999)

A Study in Coverage-Driven Test Generation. - Mike Benjamin; Daniel Geist; Alan Hartman; Gérard Mas; Ralph Smeets; Yaron Wolfsthal (DAC, 1999)

A Methodology for the Verification of a "System on Chip". - Daniel Geist; Giora Biran; Tamarah Arons; Michael Slavkin; Yvgeny Nustov; Monica Farkas; Karen Holtz; Andy Long; Dave King; Steve Barret (DAC, 1999)

Achieving Scalability in Parallel Reachability Analysis of Very Large Circuits. - Tamir Heyman; Daniel Geist; Orna Grumberg; Assaf Schuster (CAV, 2000)

Semi-Formal Test Generation with Genevieve. - Julia Dushina; Mike Benjamin; Daniel Geist (DAC, 2001)

Semi-Formal Test Generation for a Block of Industrial DSP. - Julia Dushina; Mike Benjamin; Daniel Geist (VTS, 2001)

On the Effective Deployment of Functional Formal Verification. - Yael Abarbanel-Vinov; Neta Aizenbud-Reshef; Ilan Beer; Cindy Eisner; Daniel Geist; Tamir Heyman; Iris Reuveni; Eran Rippel; Irit Shitsevalov; Yaron Wolfsthal; Tali Yatzkar-Haham (Formal Methods Syst. Des., 2001)

Symbolic Localization Reduction with Reconstruction Layering and Backtracking. - Sharon Barner; Daniel Geist; Anna Gringauze (CAV, 2002)

A Scalable Parallel Algorithm for Reachability Analysis of Very Large Circuits. - Tamir Heyman; Daniel Geist; Orna Grumberg; Assaf Schuster (Formal Methods Syst. Des., 2002)

Semi-formal test generation and resolving a temporal abstraction problem in practice: industrial application. - Julia Dushina; Mike Benjamin; Daniel Geist (ASP-DAC, 2003)

The PSL/Sugar Specification Language A Language for all Seasons. - Daniel Geist (CHARME, 2003)

Model Checking at IBM. - Shoham Ben-David; Cindy Eisner; Daniel Geist; Yaron Wolfsthal (Formal Methods Syst. Des., 2003)

Combining System Level Modeling with Assertion Based Verification. - Anat Dahan; Daniel Geist; Leonid Gluhovsky; Dmitry Pidan; Gil Shapir; Yaron Wolfsthal; Lyes Benalycherif; Romain Kamdem; Younes Lahbib (ISQED, 2005)

Computing the minimum DNF representation of Boolean functions defined by intervals. - Baruch Schieber; Daniel Geist; Ayal Zaks (Discret. Appl. Math., 2005)

Supporting SAT based BMC on Finite Path Models. - Daniel Geist; Mark Ginzburg; Yoad Lustig; Ishai Rabinovitz; Ohad Shacham; Rachel Tzoref (BMC@CAV, 2005)

Formal Verification Analysis of Load-Voltage Power Control. - Mark Moulin; Leonid Gluhovsky; Daniel Geist (Intell. Autom. Soft Comput., 2006)

A method for hunting bugs that occur due to system conflicts. - Daniel Geist; Oded Vaida (HLDVT, 2008)