Rapid circuit-specific inlining tuning for FPGA high-level synthesis. - Daniel H. Noronha; Jose P. Pinilla; Steven J. E. Wilton (ReConFig, 2017)

LeFlow: Automatic Compilation of TensorFlow Machine Learning Applications to FPGAs. - Daniel Holanda Noronha; Kahlan Gibson; Bahar Salehpour; Steven J. E. Wilton (FPT, 2018)

Kibo: An Open-Source Fixed-Point Tool-kit for Training and Inference in FPGA-Based Deep Learning Networks. - Daniel Holanda Noronha; Philip Heng Wai Leong; Steven J. E. Wilton (IPDPS Workshops, 2018)

LeFlow: Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks. - Daniel H. Noronha; Bahar Salehpour; Steven J. E. Wilton (CoRR, 2018)

On-chip FPGA Debug Instrumentation for Machine Learning Applications. - Daniel Holanda Noronha; Ruizhe Zhao; Jeffrey Goeders; Wayne Luk; Steven J. E. Wilton (FPGA, 2019)

Towards In-Circuit Tuning of Deep Learning Designs. - Zhiqiang Que; Daniel Holanda Noronha; Ruizhe Zhao; Steven J. E. Wilton; Wayne Luk (ICCAD, 2019)

An Overlay for Rapid FPGA Debug of Machine Learning Applications. - Daniel Holanda Noronha; Ruizhe Zhao; Zhiqiang Que; Jeffrey Goeders; Wayne Luk; Steven J. E. Wilton (FPT, 2019)

A parallel implementation of sequential minimal optimization on FPGA. - Daniel H. Noronha; Matheus F. Torquato; Marcelo A. C. Fernandes (Microprocess. Microsystems, 2019)

Proposal of the Tactile Glove Device. - José Claudio Vieira S. Junior; Matheus F. Torquato; Daniel H. Noronha; Sergio N. Silva; Marcelo A. C. Fernandes (Sensors, 2019)

Syncopation: Adaptive Clock Management for High-Level Synthesis Generated Circuits on FPGAs. - Kahlan Gibson; Esther Roorda; Daniel Holanda Noronha; Steven J. E. Wilton (FPL, 2020)

Towards Overlay-based Rapid In-Circuit Tuning of Deep Learning Designs. - Zhiqiang Que; Daniel Holanda Noronha; Ruizhe Zhao; Xinyu Niu; Steven J. E. Wilton; Wayne Luk (FPT, 2020)

Flexible Instrumentation for Live On-Chip Debug of Machine Learning Training on FPGAs. - Daniel Holanda Noronha; Zhiqiang Que; Wayne Luk; Steven J. E. Wilton (FCCM, 2021)

In-circuit tuning of deep learning designs. - Zhiqiang Que; Daniel Holanda Noronha; Ruizhe Zhao; Xinyu Niu; Steven J. E. Wilton; Wayne Luk (J. Syst. Archit., 2021)

Boosting Domain-Specific Debug Through Inter-frame Compression. - Zakary Nafziger; Martin Chua; Daniel Holanda Noronha; Steven J. E. Wilton (FPT, 2022)

Adaptive Clock Management of HLS-generated Circuits on FPGAs. - Kahlan Gibson; Esther Roorda; Daniel Holanda Noronha; Steven J. E. Wilton (ACM Trans. Reconfigurable Technol. Syst., 2022)