Modeling a Circuit Switched Multiprocessor Interconnect. - Daniel Nussbaum; Ingmar Vuong-Adlerberg; Anant Agarwal (SIGMETRICS, 1990)

Scalability of Parallel Machines. - Daniel Nussbaum; Anant Agarwal (Commun. ACM, 1991)

Sparcle: A Multithreaded VLSI Processor for Parallel Computing. - Anant Agarwal; Jonathan Babb; David Chaiken; Godfrey D'Souza; Kirk L. Johnson; David A. Kranz; John Kubiatowicz; Beng-Hong Lim; Gino Maa; Kenneth Mackenzie; Daniel Nussbaum; Mike Parkin; et al. (Parallel Symbolic Computing, 1992)

Run-time thread management for large-scale distributed-memory multiprocessors. - Daniel Nussbaum (1993)

Chip multithreading systems need a new operating system scheduler. - Alexandra Fedorova; Christopher Small 001; Daniel Nussbaum; Margo I. Seltzer (ACM SIGOPS European Workshop, 2004)

Using elimination to implement scalable and lock-free FIFO queues. - Mark Moir; Daniel Nussbaum; Ori Shalev; Nir Shavit (SPAA, 2005)

Performance of Multithreaded Chip Multiprocessors and Implications for Operating System Design. - Alexandra Fedorova; Margo I. Seltzer; Christopher Small 001; Daniel Nussbaum (USENIX ATC, General Track, 2005)

Hybrid transactional memory. - Peter Damron; Alexandra Fedorova; Yossi Lev; Victor Luchangco; Mark Moir; Daniel Nussbaum (ASPLOS, 2006)

A Hierarchical CLH Queue Lock. - Victor Luchangco; Daniel Nussbaum; Nir Shavit (Euro-Par, 2006)

The adaptive transactional memory test platform: a tool for experimenting with transactional code for rock (poster). - Mark Moir; Kevin Moore; Daniel Nussbaum (SPAA, 2008)

Early experience with a commercial hardware transactional memory implementation. - David Dice; Yossi Lev; Mark Moir; Daniel Nussbaum (ASPLOS, 2009)

What Kinds of Applications Can Benefit from Transactional Memory? - Mark Moir; Daniel Nussbaum (ISCA Workshops, 2010)

Simplifying concurrent algorithms by exploiting hardware transactional memory. - David Dice; Yossi Lev; Virendra J. Marathe; Mark Moir; Daniel Nussbaum; Marek Olszewski (SPAA, 2010)