Time Constrained Verification of Analog Circuits using Model-Checking Algorithms. - Darius Grabowski; Daniel Platte; Lars Hedrich; Erich Barke (FAC, 2005)

Using Sequential Equations to Improve Efficiency and Robustness. - Daniel Platte; Shangjing Jing; Ralf Sommer; Erich Barke (FDL, 2006)

Ansätze zur Verbesserung der Simulationsperformance automatisch generierter analoger Verhaltensmodelle. - Daniel Platte; Shangjing Jing; Ralf Sommer; Erich Barke (MBMV, 2006)

Robust design of E/E architecture component platforms. - Sebastian Graf 002; Sebastian Reinhart; Michael Glaß; Jürgen Teich; Daniel Platte (DAC, 2015)