Tradeoffs in designing accelerator architectures for visual computing. - Aqeel Mahesri; Daniel R. Johnson; Neal Clayton Crago; Sanjay J. Patel (MICRO, 2008)

Rigel: an architecture and scalable programming interface for a 1000-core accelerator. - John H. Kelm; Daniel R. Johnson; Matthew R. Johnson 003; Neal Clayton Crago; William Tuohy; Aqeel Mahesri; Steven S. Lumetta; Matthew I. Frank; Sanjay J. Patel (ISCA, 2009)

GoldMine: Automatic assertion generation using data mining and static analysis. - Shobha Vasudevan; David Sheridan; Sanjay J. Patel; David Tcheng; William Tuohy; Daniel R. Johnson (DATE, 2010)

Cohesion: a hybrid memory model for accelerators. - John H. Kelm; Daniel R. Johnson; William Tuohy; Steven S. Lumetta; Sanjay J. Patel (ISCA, 2010)

Implementing a GPU Programming Model on a Non-GPU Accelerator Architecture. - Stephen M. Kofsky; Daniel R. Johnson; John A. Stratton; Wen-mei W. Hwu; Sanjay J. Patel; Steven S. Lumetta (ISCA Workshops, 2010)

A Task-Centric Memory Model for Scalable Accelerator Architectures. - John H. Kelm; Daniel R. Johnson; Steven S. Lumetta; Sanjay J. Patel; Matthew I. Frank (IEEE Micro, 2010)

Energy-efficient mechanisms for managing thread context in throughput processors. - Mark Gebhart; Daniel R. Johnson; David Tarjan; Stephen W. Keckler; William J. Dally; Erik Lindholm; Kevin Skadron (ISCA, 2011)

Rigel: A 1, 024-Core Single-Chip Accelerator Architecture. - Daniel R. Johnson; Matthew R. Johnson 003; John H. Kelm; William Tuohy; Steven S. Lumetta; Sanjay J. Patel (IEEE Micro, 2011)

Cohesion: An Adaptive Hybrid Memory Model for Accelerators. - John H. Kelm; Daniel R. Johnson; William Tuohy; Steven S. Lumetta; Sanjay J. Patel (IEEE Micro, 2011)

A Hierarchical Thread Scheduler and Register File for Energy-Efficient Throughput Processors. - Mark Gebhart; Daniel R. Johnson; David Tarjan; Stephen W. Keckler; William J. Dally; Erik Lindholm; Kevin Skadron (ACM Trans. Comput. Syst., 2012)

Scaling the Power Wall: A Path to Exascale. - Oreste Villa; Daniel R. Johnson; Mike O'Connor; Evgeny Bolotin; David W. Nellans; Justin Luitjens; Nikolai Sakharnykh; Peng Wang; Paulius Micikevicius; Anthony Scudiero; Stephen W. Keckler; William J. Dally (SC, 2014)

Priority-based cache allocation in throughput processors. - Dong Li; Minsoo Rhu; Daniel R. Johnson; Mike O'Connor; Mattan Erez; Doug Burger; Donald S. Fussell; Stephen W. Redder (HPCA, 2015)

A variable warp size architecture. - Timothy G. Rogers; Daniel R. Johnson; Mike O'Connor; Stephen W. Keckler (ISCA, 2015)

Flexible software profiling of GPU architectures. - Mark Stephenson; Siva Kumar Sastry Hari; Yunsup Lee; Eiman Ebrahimi; Daniel R. Johnson; David W. Nellans; Mike O'Connor; Stephen W. Keckler (ISCA, 2015)

A patch memory system for image processing and computer vision. - Jason Clemons; Chih-Chi Cheng; Iuri Frosio; Daniel R. Johnson; Stephen W. Keckler (MICRO, 2016)

Architecting an Energy-Efficient DRAM System for GPUs. - Niladrish Chatterjee; Mike O'Connor; Donghyuk Lee; Daniel R. Johnson; Stephen W. Keckler; Minsoo Rhu; William J. Dally (HPCA, 2017)

Speculative reconvergence for improved SIMT efficiency. - Sana Damani; Daniel R. Johnson; Mark Stephenson; Stephen W. Keckler; Eddie Q. Yan; Michael McKeown; Olivier Giroux (CGO, 2020)

GPU Subwarp Interleaving. - Sana Damani; Mark Stephenson; Ram Rangan; Daniel R. Johnson; Rishkul Kulkami; Stephen W. Keckler (HPCA, 2022)