Low-Power Heterogeneous Systems-on-Chips. - Christian Piguet; Jean-Luc Nagel; Vincent Peiris; Steve Gyger; Daniel Séverac; Marc-Nicolas Morgan; Jean-Marc Masgonty (J. Low Power Electron., 2008)

A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks. - Erwan Le Roux; Nicola Scolari; Budhaditya Banerjee; Claude Arm; Patrick Volet; Daniel Sigg; Pascal Heim; Jean-Félix Perotto; François Kaess; Nicolas Raemy; Alexandre Vouilloz; David Ruffieux; et al. (ISSCC, 2010)

Ultra low-power standard cell design using planar bulk CMOS in subthreshold operation. - Marc Pons 001; Jean-Luc Nagel; Daniel Séverac; Marc-Nicolas Morgan; Daniel Sigg; Pierre-François Rüedi; Christian Piguet (PATMOS, 2013)

Sub-Threshold Design and Architectural Choices. - Christian Piguet; Marc Pons 001; Daniel Séverac (ISVLSI, 2015)

Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation. - Marc Pons 001; Thanh-Chau Le; Claude Arm; Daniel Séverac; Jean-Luc Nagel; Marc-Nicolas Morgan; Stéphane Emery (ESSCIRC, 2016)

11.5 A 3.2×1.5×0.8mm3 240nA 1.25-to-5.5V 32kHz-DTCXO RTC module with an overall accuracy of µ1ppm and an all-digital 0.1ppm compensation-resolution scheme at 1Hz. - David Ruffieux; Franz-Xaver Pengg; Nicola Scolari; Frédéric Giroud; Daniel Séverac; Thanh Le; Silvio Dalla Piazza; Olivier Aubry (ISSCC, 2016)