Instance Generation for SAT-based ATPG. - Daniel Tille; Görschwin Fey; Rolf Drechsler (DDECS, 2007)

Experimental Studies on SAT-Based ATPG for Gate Delay Faults. - Stephan Eggersglüß; Daniel Tille; Görschwin Fey; Rolf Drechsler; Andreas Glowatz; Friedrich Hapke; Jürgen Schlöffel (ISMVL, 2007)

SAT-based Automatic Test Pattern Generation. - Rolf Drechsler; Stephan Eggersglüß; Görschwin Fey; Daniel Tille (Evolutionary Test Generation, 2008)

Incremental SAT Instance Generation for SAT-based ATPG. - Daniel Tille; Rolf Drechsler (DDECS, 2008)

On Acceleration of SAT-Based ATPG for Industrial Designs. - Rolf Drechsler; Stephan Eggersglüß; Görschwin Fey; Andreas Glowatz; Friedrich Hapke; Jürgen Schlöffel; Daniel Tille (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Test Pattern Generation using Boolean Proof Engines. - Rolf Drechsler; Stephan Eggersglüß; Görschwin Fey; Daniel Tille (Springer, 2009)

Speeding up SAT-Based ATPG Using Dynamic Clause Activation. - Stephan Eggersglüß; Daniel Tille; Rolf Drechsler (Asian Test Symposium, 2009)

A fast untestability proof for SAT-based ATPG. - Daniel Tille; Rolf Drechsler (DDECS, 2009)

Effiziente Erfüllbarkeitsalgorithmen für die Generierung von Testmustern (Efficient Satisfiability Solving Algorithms for Test Pattern Generation). - Rolf Drechsler; Stephan Eggersglüß; Görschwin Fey; Jürgen Schlöffel; Daniel Tille (it Inf. Technol., 2009)

Improving CNF representations in SAT-based ATPG for industrial circuits using BDDs. - Daniel Tille; Stephan Eggersglüß; Rene Krenz-Baath; Jürgen Schlöffel; Rolf Drechsler (ETS, 2010)

Efficient test generation with maximal crosstalk-induced noise using unconstrained aggressor excitation. - Stephan Eggersglüß; Daniel Tille; Rolf Drechsler (ISCAS, 2010)

Incremental Solving Techniques for SAT-based ATPG. - Daniel Tille; Stephan Eggersglüß; Rolf Drechsler (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Automated formal verification of X propagation with respect to testability issues. - Mehdi Dehbashi; Daniel Tille; Ulrike Pfannkuchen; Stephan Eggersglüß (IDT, 2014)

Formal Test Point Insertion for Region-based Low-Capture-Power Compact At-Speed Scan Test. - Stephan Eggersglüß; Stefan Holst; Daniel Tille; Kohei Miyase; Xiaoqing Wen (ATS, 2016)

A lightweight X-masking scheme for IoT designs. - Daniel Tille; Benedikt Gottinger; Ulrike Pfannkuchen (ITC-Asia, 2017)

On enabling diagnosis for 1-Pin Test fails in an industrial flow. - Daniel Tille; Benedikt Gottinger; Ulrike Pfannkuchen; Helmut Graeb; Ulf Schlichtmann (ASP-DAC, 2018)

Hybrid Architecture for Embedded Test Compression to Process Rejected Test Patterns. - Sebastian Huhn 001; Daniel Tille; Rolf Drechsler (ETS, 2019)

A Hybrid Embedded Multichannel Test Compression Architecture for Low-Pin Count Test Environments in Safety-Critical Systems. - Sebastian Huhn 001; Daniel Tille; Rolf Drechsler (ITC-Asia, 2019)

Test Time and Area Optimized BrST Scheme for Automotive ICs. - Nilanjan Mukherjee 001; Jerzy Tyszer; Daniel Tille; Mahendar Sapati; Yingdi Liu; Jeffrey Mayer; Sylwester Milewski; Elham K. Moghaddam; Janusz Rajski; Jedrzej Solecki (ITC, 2019)

A Scalable Design Flow for Performance Monitors Using Functional Path Ring Oscillators. - Tobias Kilian; Heiko Ahrens; Daniel Tille; Martin Huch; Ulf Schlichtmann (ITC, 2021)

Time and Area Optimized Testing of Automotive ICs. - Nilanjan Mukherjee 001; Daniel Tille; Mahendar Sapati; Yingdi Liu; Jeffrey Mayer; Sylwester Milewski; Elham K. Moghaddam; Janusz Rajski; Jedrzej Solecki; Jerzy Tyszer (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Reducing Routing Overhead by Self-Enabling Functional Path Ring Oscillators. - Tobias Kilian; Markus Hanel; Daniel Tille; Martin Huch; Ulf Schlichtmann (ETS, 2022)

A Path Selection Flow for Functional Path Ring Oscillators using Physical Design Data. - Tobias Kilian; Markus Hanel; Daniel Tille; Martin Huch; Ulf Schlichtmann (ITC, 2022)

An efficient High-Volume Production Performance Screening using On-Chip Ring Oscillators. - Tobias Kilian; Abhishek Sengupta; Daniel Tille; Martin Huch; Ulf Schlichtmann (DFT, 2023)

A Novel LBIST Signature Computation Method for Automotive Microcontrollers using a Digital Twin. - Daniel Tille; Leon Klimasch; Sebastian Huhn 001 (VTS, 2023)

Performance Screening Using Functional Path Ring Oscillators. - Tobias Kilian; Daniel Tille; Martin Huch; Markus Hanel; Ulf Schlichtmann (IEEE Trans. Very Large Scale Integr. Syst., 2023)

On the Relation Between Reliability and Entropy in Physical Unclonable Functions. - Vasilii Kulagin; Sergio Vinagrero Gutierrez; Tobias Kilian; Daniel Tille; Ulf Schlichtmann; Giorgio Di Natale; Elena-Ioana Vatajelu (IEEE Des. Test, 2024)

Self-Aware Silicon: Enhancing Lifecycle Management with Intelligent Testing and Data Insights. - Fabian Vargas 001; Marko S. Andjelkovic; Milos Krstic; Anirban Kar; Swati Deshwal; Yogesh S. Chauhan; Hussam Amrouch; Daniel Tille; Sebastian Huhn 001 (ETS, 2025)

European Test Symposium Teams: an Anniversary Snapshot. - Maksim Jenihhin; Jaan Raik; Artur Jutman; Natalia Cherezova; Raimund Ubar; Liviu Miclea; Szilárd Enyedi; I. Stefan; Ovidiu Stan; Cosmina Corches; Z. Peng; Petru Eles; et al. (ETS, 2025)