Space-time AER protocol receiver asynchronously controlled on FPGA. - Susana Ortega-Cisneros; Juan José Raygoza-Panduro; Daniel Tonali Aranda Bretón; José Roberto Reyes Barón (CCE, 2014)

Characterization technique to implement self-timed cells for VLSI design blocks. - Susana Ortega-Cisneros; Juan José Raygoza-Panduro; José Roberto Reyes Barón; Daniel Tonali Aranda Bretón; Antonio Casillas Zamora (CCE, 2014)