Improving Resilience to Timing Errors by Exposing Variability Effects to Software in Tightly-Coupled Processor Clusters. - Abbas Rahimi; Daniele Cesarini; Andrea Marongiu; Rajesh K. Gupta 001; Luca Benini (IEEE J. Emerg. Sel. Topics Circuits Syst., 2014)

Task scheduling strategies to mitigate hardware variability in embedded shared memory clusters. - Abbas Rahimi; Daniele Cesarini; Andrea Marongiu; Rajesh K. Gupta 001; Luca Benini (DAC, 2015)

An optimized task-based runtime system for resource-constrained parallel accelerators. - Daniele Cesarini; Andrea Marongiu; Luca Benini (DATE, 2016)

Benefits in Relaxing the Power Capping Constraint. - Daniele Cesarini; Andrea Bartolini; Luca Benini (ANDARE@PACT, 2017)

Energy Saving and Thermal Management Opportunities in a Workload-Aware MPI Runtime for a Scientific HPC Computing Node. - Daniele Cesarini; Andrea Bartolini; Luca Benini (PARCO, 2017)

Prediction horizon vs. efficiency of optimal dynamic thermal control policies in HPC nodes. - Daniele Cesarini; Andrea Bartolini; Luca Benini (VLSI-SoC, 2017)

Modeling and Evaluation of Application-Aware Dynamic Thermal Control in HPC Nodes. - Daniele Cesarini; Andrea Bartolini; Luca Benini (VLSI-SoC (Selected Papers), 2017)

COUNTDOWN: a run-time library for application-agnostic energy saving in MPI communication primitives. - Daniele Cesarini; Andrea Bartolini; Pietro Bonfà; Carlo Cavazzoni; Luca Benini (ANDARE@PACT, 2018)

Evaluation of NTP/PTP fine-grain synchronization performance in HPC clusters. - Antonio Libri; Andrea Bartolini; Daniele Cesarini; Luca Benini (ANDARE@PACT, 2018)

Autotuning and adaptivity in energy efficient HPC systems: the ANTAREX toolbox. - Cristina Silvano; Gianluca Palermo; Giovanni Agosta; Amir H. Ashouri; Davide Gadioli; Stefano Cherubin; Emanuele Vitali; Luca Benini; Andrea Bartolini; Daniele Cesarini; João M. P. Cardoso; João Bispo; et al. (CF, 2018)

COUNTDOWN - three, two, one, low power! A Run-time Library for Energy Saving in MPI Communication Primitives. - Daniele Cesarini; Andrea Bartolini; Pietro Bonfà; Carlo Cavazzoni; Luca Benini (CoRR, 2018)

Self-Aware Thermal Management for High-Performance Computing Processors. - Andrea Bartolini; Roberto Diversi; Daniele Cesarini; Francesco Beneventi (IEEE Des. Test, 2018)

Unleashing Fine-Grained Parallelism on Embedded Many-Core Accelerators with Lightweight OpenMP Tasking. - Giuseppe Tagliavini; Daniele Cesarini; Andrea Marongiu (IEEE Trans. Parallel Distributed Syst., 2018)

Paving the Way Toward Energy-Aware and Automated Datacentre. - Andrea Bartolini; Francesco Beneventi; Andrea Borghesi; Daniele Cesarini; Antonio Libri; Luca Benini; Carlo Cavazzoni (ICPP Workshops, 2019)

Supporting the Scale-Up of High Performance Application to Pre-Exascale Systems: The ANTAREX Approach. - Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea Rosario Beccari; Luca Benini; Loïc Besnard; João Bispo; Radim Cmar; João M. P. Cardoso; Carlo Cavazzoni; Daniele Cesarini; Stefano Cherubin; et al. (PDP, 2019)

Evaluating the Advantage of Reactive MPI-aware Power Control Policies. - Daniele Cesarini; Carlo Cavazzoni; Andrea Bartolini (PPAM (2), 2019)

The ANTAREX Domain Specific Language for High Performance Computing. - Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea Rosario Beccari; Luca Benini; Loïc Besnard; João Bispo; Radim Cmar; João M. P. Cardoso; Carlo Cavazzoni; Daniele Cesarini; Stefano Cherubin; et al. (CoRR, 2019)

The ANTAREX domain specific language for high performance computing. - Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea Rosario Beccari; Luca Benini; Loïc Besnard; João Bispo; Radim Cmar; João M. P. Cardoso; Carlo Cavazzoni; Daniele Cesarini; Stefano Cherubin; et al. (Microprocess. Microsystems, 2019)

Countdown Slack: A Run-Time Library to Reduce Energy Footprint in Large-Scale MPI Applications. - Daniele Cesarini; Andrea Bartolini; Andrea Borghesi; Carlo Cavazzoni; Mathieu Luisier; Luca Benini (IEEE Trans. Parallel Distributed Syst., 2020)

COUNTDOWN: A Run-Time Library for Performance-Neutral Energy Saving in MPI Applications. - Daniele Cesarini; Andrea Bartolini; Pietro Bonfà; Carlo Cavazzoni; Luca Benini (IEEE Trans. Computers, 2021)

Meet Monte Cimone: exploring RISC-V high performance compute clusters. - Federico Ficarelli; Andrea Bartolini; Emanuele Parisi; Francesco Beneventi; Francesco Barchi; Daniele Gregori; Fabrizio Magugliani; Marco Cicala; Cosimo Gianfreda; Daniele Cesarini; Andrea Acquaviva; Luca Benini (CF, 2022)

Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers. - Andrea Bartolini; Federico Ficarelli; Emanuele Parisi; Francesco Beneventi; Francesco Barchi; Daniele Gregori; Fabrizio Magugliani; Marco Cicala; Cosimo Gianfreda; Daniele Cesarini; Andrea Acquaviva; Luca Benini (SOCC, 2022)

RISC-V-Based Platforms for HPC: Analyzing Non-functional Properties for Future HPC and Big-Data Clusters. - William Fornaciari; Federico Reghenzani; Federico Terraneo; Davide Baroffio; Cecilia Metra; Martin Omaña 001; Josie E. Rodriguez Condia; Matteo Sonza Reorda; Robert Birke; Iacopo Colonnelli; Gianluca Mittone; Marco Aldinucci; et al. (SAMOS, 2023)

Domain-Specific Energy Modeling for Drug Discovery and Magnetohydrodynamics Applications. - Lorenzo Carpentieri; Marco D'Antonio; Kaijie Fan; Luigi Crisci; Biagio Cosenza; Federico Ficarelli; Daniele Cesarini; Gianmarco Accordi; Davide Gadioli; Gianluca Palermo; Peter Thoman; Philip Salzmann; et al. (SC Workshops, 2023)

SYnergy: Fine-grained Energy-Efficient Heterogeneous Computing for Scalable Energy Saving. - Kaijie Fan; Marco D'Antonio; Lorenzo Carpentieri; Biagio Cosenza; Federico Ficarelli; Daniele Cesarini (SC, 2023)

RUAD: Unsupervised anomaly detection in HPC systems. - Martin Molan; Andrea Borghesi; Daniele Cesarini; Luca Benini; Andrea Bartolini (Future Gener. Comput. Syst., 2023)

High-throughput drug discovery on the Fujitsu A64FX architecture. - Filippo Barbari; Federico Ficarelli; Daniele Cesarini (HPC Asia Workshops, 2024)

Benchmarking Ethernet Interconnect for HPC/AI workloads. - Lorenzo Pichetti; Daniele De Sensi; Karthee Sivalingam; Stepan Nassyr; Daniele Cesarini; Matteo Turisini; Dirk Pleiter; Aldo Artigiani; Flavio Vella (SC Workshops, 2024)

Exploring GPU-to-GPU Communication: Insights into Supercomputer Interconnects. - Daniele De Sensi; Lorenzo Pichetti; Flavio Vella; Tiziano De Matteis; Zebin Ren; Luigi Fusco; Matteo Turisini; Daniele Cesarini; Kurt Lust; Animesh Trivedi; Duncan Roweth; Filippo Spiga; et al. (SC, 2024)

GRAAFE: GRaph Anomaly Anticipation Framework for Exascale HPC systems. - Martin Molan; Mohsen Seyedkazemi Ardebili; Junaid Ahmed Khan; Francesco Beneventi; Daniele Cesarini; Andrea Borghesi; Andrea Bartolini (Future Gener. Comput. Syst., 2024)

Monte Cimone v2: Down the Road of RISC-V High-Performance Computers. - Emanuele Venieri; Simone Manoni; Giacomo Madella; Federico Ficarelli; Daniele Gregori; Daniele Cesarini; Luca Benini; Andrea Bartolini (CoRR, 2025)

Assessing Tenstorrent's RISC-V MatMul Acceleration Capabilities. - Hiari Pizzini Cavagna; Daniele Cesarini; Andrea Bartolini (CoRR, 2025)