Towards a Source Level Compiler: Source Level Modulo Scheduling. - Yosi Ben-Asher; Danny Meisler (ICPP Workshops, 2006)

Reducing Memory Constraints in Modulo Scheduling Synthesis for FPGAs. - Yosi Ben-Asher; Danny Meisler; Nadav Rotem (ACM Trans. Reconfigurable Technol. Syst., 2010)