A Production-Oriented Multiplexing System for Testing above 2.5 Gbps. - David C. Keezer; Dany Minier; Marie-Christine Caron (ITC, 2003)

Modular Extension of ATE to 5 Gbps. - David C. Keezer; Dany Minier; F. Binette (ITC, 2004)

Multiplexing ATE Channels for Production Testing at 2.5 Gbps. - David C. Keezer; Dany Minier; Marie-Christine Caron (IEEE Des. Test Comput., 2004)

Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. - David C. Keezer; Dany Minier; Patrice Ducharme (IEEE Des. Test Comput., 2006)

Method for reducing jitter in multi-gigahertz ATE. - David C. Keezer; Dany Minier; Patrice Ducharme (DATE, 2007)

Multi-GHz loopback testing using MEMs switches and SiGe logic. - David C. Keezer; Dany Minier; Patrice Ducharme; Doris Viens; Greg Flynn; John McKillop (ITC, 2007)

Variable Delay of Multi-Gigahertz Digital Signals for Deskew and Jitter-Injection Test Applications. - David C. Keezer; Dany Minier; Patrice Ducharme (DATE, 2008)

An Electronic Module for 12.8 Gbps Multiplexing and Loopback Test. - David C. Keezer; Dany Minier; Patrice Ducharme; A. M. Majid (ITC, 2008)

MEMS Switches and SiGe Logic for Multi-GHz Loopback Testing. - David C. Keezer; Dany Minier; Patrice Ducharme; Doris Viens; Greg Flynn; John McKillop (VLSI Design, 2008)

A development platform and electronic modules for automated test up to 20 Gbps. - David C. Keezer; Carl Gray; A. M. Majid; Dany Minier; Patrice Ducharme (ITC, 2009)

Low-Cost 20 Gbps Digital Test Signal Synthesis Using SiGe and InP Logic. - David C. Keezer; Carl Gray; Dany Minier; Patrice Ducharme (J. Electron. Test., 2010)

Experimental Evaluation of Jitter Reduction Methods for Multi-Gigahertz Test. - David C. Keezer; Dany Minier; Hongjie Li (ITC-Asia, 2023)

Characterization of Ultra-low Random Jitter Reduction Methods up to 36 GHz. - David C. Keezer; Dany Minier; Hongjie Li (ETS, 2024)

Multi-Stage Jitter-Reduction and Frequency Multiplication for 54 GHz ATE Clocks. - David C. Keezer; Dany Minier (ITC-Asia, 2024)