A New Testability Measure for Digital Circuits. - Jian-Cao Wang; Daozheng Wei (ITC, 1986)

A Global Test Point Placement Algorithm of Combinational Circuits. - Dong Xiang; Daozheng Wei; Shisong Chen (VLSI Design, 1992)

DLJ: A dynamic line-justification algorithm for test generation. - Qingfang Chen; Daozheng Wei (J. Comput. Sci. Technol., 1993)

Deductive fault simulation algorithm based on fault collapsing. - Yunzhan Gong; Daozheng Wei (J. Comput. Sci. Technol., 1993)

An Optimal Design for Parallel Test Generation Based on Circuit Partitioning. - Dong Xiang; Daozheng Wei (VLSI Design, 1994)

GLOBAL: A design for random testability algorithm. - Dong Xiang; Daozheng Wei (J. Comput. Sci. Technol., 1994)

Accelerated techniques in stem fault simulation. - Yin Shi; Daozheng Wei (J. Comput. Sci. Technol., 1996)