Two-Level Logic Synthesis on PAL-Based CPLD and FPGA Using Decomposition. - Dariusz Kania (EUROMICRO, 1999)

Decomposition-Based Synthesis and its Application in PAL-Oriented Technology Mapping. - Dariusz Kania (EUROMICRO, 2000)

A Technology Mapping Algorithm for PAL-Based Devices Using Multi-Output Function Graphs. - Dariusz Kania (EUROMICRO, 2000)

Improved Technology Mapping for PAL-Based Devices Using a New Approach to Multi-Output Boolean Functions. - Dariusz Kania (DATE, 2002)

Logic synthesis of multi-output functions for PAL-based CPLDs. - Dariusz Kania (FPT, 2002)

State Assignment for PAL-based CPLDs. - Robert Czerwinski; Dariusz Kania (DSD, 2005)

A Novel Method of Two-Stage Decomposition Dedicated for PAL-based CPLDs. - Dariusz Kania; Józef Kulisz; Adam Milik (DSD, 2005)

Decomposition of Multi-Output Functions for CPLDs. - Dariusz Kania; Adam Milik; Józef Kulisz (DSD, 2005)

A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS. - Dariusz Kania (ACM Great Lakes Symposium on VLSI, 2007)

Logic synthesis for PAL-based CPLD-s based on two-stage decomposition. - Dariusz Kania; Józef Kulisz (J. Syst. Softw., 2007)

CPLD-oriented Synthesis of Finite State Machines. - Robert Czerwinski; Dariusz Kania (DSD, 2009)

State assignment and logic optimization for finite state machines. - Robert Czerwinski; Dariusz Kania (PDeS, 2009)

Synthesis of finite state machines for CPLDs. - Robert Czerwinski; Dariusz Kania (Int. J. Appl. Math. Comput. Sci., 2009)

Decomposition-based logic synthesis for PAL-based CPLDs. - Adam Opara; Dariusz Kania (Int. J. Appl. Math. Comput. Sci., 2010)

Logic synthesis based on decomposition for CPLDs. - Dariusz Kania; Adam Milik (Microprocess. Microsystems, 2010)

Area and speed oriented synthesis of FSMs for PAL-based CPLDs. - Robert Czerwinski; Dariusz Kania (Microprocess. Microsystems, 2012)

Interpolated-DFT-Based Fast and Accurate Frequency Estimation for the Control of Power. - Jozef Borkowski; Dariusz Kania; Janusz Mroczka (IEEE Trans. Ind. Electron., 2014)

Logic Decomposition for PAL-Based CPLDs. - Dariusz Kania (J. Circuits Syst. Comput., 2015)

Interpolated-DFT-Based Fast and Accurate Amplitude and Phase Estimation for the Control of Power. - Jozef Borkowski; Dariusz Kania (CoRR, 2016)

State Assignment and Optimization of Ultra-High-Speed FSMs Utilizing Tristate Buffers. - Robert Czerwinski; Dariusz Kania (ACM Trans. Design Autom. Electr. Syst., 2016)

Estimation methods of multifrequency signals with noise and harmonics for PV systems with a DSP processor. - Dariusz Kania; Jozef Borkowski (TSP, 2017)

Area-oriented technology mapping for LUT-based logic blocks. - Marcin Kubica 002; Dariusz Kania (Int. J. Appl. Math. Comput. Sci., 2017)

Logic synthesis for FPGAs based on cutting of BDD. - Marcin Kubica 002; Adam Opara; Dariusz Kania (Microprocess. Microsystems, 2017)

Influence of Noise on Multifrequency Signals for the Amplitude and Phase Estimation in Photovoltaic Systems with a DSP Processor. - Dariusz Kania; Jozef Borkowski; Janusz Mroczka (TSP, 2018)

Strategy of logic synthesis using MTBDD dedicated to FPGA. - Adam Opara; Marcin Kubica 002; Dariusz Kania (Integr., 2018)

Low Power Synthesis of Finite State Machines - State Assignment Decomposition Algorithm. - Krzysztof Kajstura; Dariusz Kania (J. Circuits Syst. Comput., 2018)

Simulation Comparison of Frequency Estimation Methods Applied for Power Control in Renewable Energy Systems. - Józef Borkowski; Dariusz Kania (SMACD, 2019)

A Technology Mapping of FSMs Based on a Graph of Excitations and Outputs. - Marcin Kubica 002; Dariusz Kania; Józef Kulisz (IEEE Access, 2019)

Postural Symmetry Evaluation Based on the Analysis of Temporary and Average CoP Displacements Registered During the Follow-Up Posturography. - Tomasz Lukaszewicz; Dariusz Kania; Zenon Kidon; Krystyna Pethe-Kania (IEEE Access, 2019)

Methods of Improving Time Efficiency of Decomposition Dedicated at FPGA Structures and Using BDD in the Process of Cyber-Physical Synthesis. - Adam Opara; Marcin Kubica 002; Dariusz Kania (IEEE Access, 2019)

IEEE Access Special Section: Cyber-Physical Systems. - Remigiusz Wisniewski; Grzegorz Benysek; Luís Gomes 001; Dariusz Kania; Theodore E. Simos; Mengchu Zhou (IEEE Access, 2019)

Trajectory of Fifths in Music Data Mining. - Dariusz Kania; Paulina Kania; Tomasz Lukaszewicz (IEEE Access, 2021)

Frequency Estimation in Interpolated Discrete Fourier Transform With Generalized Maximum Sidelobe Decay Windows for the Control of Power. - Józef Borkowski; Janusz Mroczka; Adam Matusiak; Dariusz Kania (IEEE Trans. Ind. Informatics, 2021)

Technology Mapping for LUT-Based FPGA - Marcin Kubica 002; Adam Opara; Dariusz Kania (Springer, 2021)

A Music Classification Approach Based on the Trajectory of Fifths. - Tomasz Lukaszewicz; Dariusz Kania (IEEE Access, 2022)

Decomposition Approaches for Power Reduction. - Adam Opara; Marcin Kubica 002; Dariusz Kania (IEEE Access, 2023)

Switching Activity Reduction of SOP Networks. - Marcin Kubica 002; Boleslaw Pochopien; Dariusz Kania (IEEE Access, 2024)

Trajectory of Fifths in Tonal Mode Detection. - Tomasz Lukaszewicz; Dariusz Kania (IEEE Access, 2025)

Trajectory of Fifths Based on Chroma Subbands Extraction-A New Approach to Music Representation, Analysis, and Classification. - Tomasz Lukaszewicz; Dariusz Kania (IEEE Trans. Pattern Anal. Mach. Intell., 2025)