FPGA Integrated Co-Design. - Richard E. Haskell; Darrin M. Hanna (MSE, 2001)

Rapid Prototyping Using a Microprocessor Core on a Spartan II FPGA. - Richard E. Haskell; Darrin M. Hanna (Embedded Systems and Applications, 2003)

Using Flowpaths for the High-Level Synthesis of Reconfigurable Systems. - Darrin M. Hanna; Richard E. Haskell (Engineering of Reconfigurable Systems and Algorithms, 2003)

Optimizing Fuzzy Decision Trees Using Genetic Algorithms. - Ping Li; Richard E. Haskell; Darrin M. Hanna (IC-AI, 2003)

Implementing Software Programs in FPGAs Using Flowpaths. - Darrin M. Hanna; Richard E. Haskell (ESA/VLSI, 2004)

Using Fuzzy Clustering for Real-time Space Flight Safety. - Charles Lee; Darrin M. Hanna; Richard E. Haskell; Richard L. Alena (IC-AI, 2004)

A VHDL–Forth Core for FPGAs. - Richard E. Haskell; Darrin M. Hanna (Microprocess. Microsystems, 2004)

Geno-fuzzy classification trees. - Richard E. Haskell; Charles Lee; Darrin M. Hanna (Pattern Recognit., 2004)

Java Flowpaths: Efficiently Generating Circuits for Embedded Systems from Java. - Darrin M. Hanna; Michael DuChene; Girma S. Tewolde; Jay Sattler (ESA, 2006)

Electroporation-Induced Cell Lysis in SWLA-2 Hybridomas. - Barbara A. Oakley; Brooks A. Gross; Sara G. Martens; Darrin M. Hanna; Gabrielle A. Stryker (EMBC, 2006)

3D Signature Biometrics Using Curvature Moments. - Richard E. Haskell; Darrin M. Hanna; Kevin Van Sickle (IC-AI, 2006)

Flowpaths: Compiling stack-based IR to hardware. - Darrin M. Hanna; Richard E. Haskell (Microprocess. Microsystems, 2006)

A Compiler to Generate Hardware from Java Byte Codes for High Performance, Low Energy Embedded Systems. - Darrin M. Hanna; Michael DuChene; Lawrence Kennedy; Brian Carpenter (ERSA, 2007)

Particle Swarm Optimization for Cluster-Based Classification of Breast Cancer Data. - Girma S. Tewolde; Darrin M. Hanna (GEM, 2007)

Speedup using Flowpaths for a Finite Difference Solution of a 3D Parabolic PDE. - Darrin M. Hanna; Anna Maria Spagnuolo; Michael DuChene (IPDPS, 2007)

Executing large algorithms on low-capacity FPGAs using flowpath partitioning and runtime reconfiguration. - Darrin M. Hanna; Michael DuChene (Microprocess. Microsystems, 2007)

Best Practices Involving Teamwork in the Classroom: Results From a Survey of 6435 Engineering Student Respondents. - Barbara A. Oakley; Darrin M. Hanna; Zenon Kuzmyn; Richard M. Felder (IEEE Trans. Educ., 2007)

Hardware PSO for sensor network applications. - Girma S. Tewolde; Darrin M. Hanna; Richard E. Haskell (SIS, 2008)

Accelerating the performance of particle swarm optimization for embedded applications. - Girma S. Tewolde; Darrin M. Hanna; Richard E. Haskell (IEEE Congress on Evolutionary Computation, 2009)

Multi-swarm parallel PSO: Hardware implementation. - Girma S. Tewolde; Darrin M. Hanna; Richard E. Haskell (SIS, 2009)

Enhancing performance of PSO with automatic parameter tuning technique. - Girma S. Tewolde; Darrin M. Hanna; Richard E. Haskell (SIS, 2009)

FPGA-based Hybrid Systems in Forth: a Forth Core and Reconfigurable Hardware from Forth. - Darrin M. Hanna; Richard E. Haskell (ESA, 2010)

Implementing Error Detection and Error Correction with Explicit Area Constraints. - David Foster; Darrin M. Hanna (ERSA, 2010)

Maximizing area-constrained partial fault tolerance in reconfigurable logic. - David L. Foster; Darrin M. Hanna (FPGA, 2010)

Artificial neural networks capable of learning spatiotemporal chemical diffusion in the cortical brain. - Brooks A. Gross; Darrin M. Hanna (Pattern Recognit., 2010)

A modular and efficient hardware architecture for particle swarm optimization algorithm. - Girma S. Tewolde; Darrin M. Hanna; Richard E. Haskell (Microprocess. Microsystems, 2012)

An embedded Forth core with floating point and branch prediction. - Darrin M. Hanna; Bryant Jones; Lincoln Lorenz; Steffen Porthun (MWSCAS, 2013)

Applying partial fault tolerance with explicit area constraints. - David L. Foster; Darrin M. Hanna (Int. J. Embed. Syst., 2013)

Maximising area-constrained partial fault tolerance in reconfigurable logic using selection criteria. - David L. Foster; Darrin M. Hanna (Int. J. Embed. Syst., 2013)

A medium-grained reconfigurable architecture targeting high-level synthesis implementation. - Jason Gorski; Darrin M. Hanna (MWSCAS, 2017)

Automatic cache partitioning method for high-level synthesis. - Bryant Jones; Darrin M. Hanna (Microprocess. Microsystems, 2019)

The FPOA, a Medium-grained Reconfigurable Architecture for High-level Synthesis. - Jason Gorski; Darrin M. Hanna (ACM Trans. Reconfigurable Technol. Syst., 2019)

Co-design of a TinyLLM using Programmable Logic and Software on an FPGA. - Michael Muller; Alexander Tyshka; Max Theisen; Darrin M. Hanna (MWSCAS, 2024)

Optimal FPGA Implementation of Dense Extended Kalman Filter for Simultaneous Cell State Estimation. - Luke Nuculaj; Adam Kidwell; Connor Homayouni; Alex Fillmore; Darrin M. Hanna; Jun Chen (MWSCAS, 2024)

Parametrized low-complexity hardware architecture of an H.264-based video encoder for FPGAs. - Azam Tayyebi; Darrin M. Hanna; Bryant Jones (Microprocess. Microsystems, 2024)