An Investigation of Chip-Level Hardware Support for Web Mining. - Kin Fun Li; Darshika G. Perera (AINA Workshops (1), 2007)

Parallel Computation of Similarity Measures Using an FPGA-Based Processor Array. - Darshika G. Perera; Kin Fun Li (AINA, 2008)

Similarity Computation Using Reconfigurable Embedded Hardware. - Darshika G. Perera; Kin Fun Li (DASC, 2009)

FPGA-Based Reconfigurable Hardware for Compute Intensive Data Mining Applications. - Darshika G. Perera; Kin Fun Li (3PGCIC, 2011)

A Hardware Collective Intelligence Agent. - Kin Fun Li; Darshika G. Perera (Trans. Comput. Collect. Intell., 2013)

Analysis of Computational Models and Application Characteristics Suitable for Reconfigurable FPGAs. - Darshika G. Perera; Kin Fun Li (3PGCIC, 2015)

Analysis of FPGA-Based Reconfiguration Methods for Mobile and Embedded Applications. - Darshika G. Perera (FPGAworld, 2015)

An efficient embedded multi-ported memory architecture for next-generation FPGAs. - S. Navid Shahrouzi; Darshika G. Perera (ASAP, 2017)

A fast and scalable FPGA-based parallel processing architecture for K-means clustering for big data analysis. - Ramprasad Raghavan; Darshika G. Perera (PACRIM, 2017)

An efficient FPGA-based memory architecture for compute-intensive applications on embedded devices. - S. Navid Shahrouzi; Darshika G. Perera (PACRIM, 2017)

Dynamic partial reconfigurable hardware architecture for principal component analysis on mobile and embedded devices. - S. Navid Shahrouzi; Darshika G. Perera (EURASIP J. Embed. Syst., 2017)

An FPGA-Based Hardware Accelerator for K-Nearest Neighbor Classification for Machine Learning on Mobile Devices. - Mokhles A. Mohsin; Darshika G. Perera (HEART, 2018)

Optimized Counter-Based Multi-Ported Memory Architectures for Next-Generation FPGAs. - S. Navid Shahrouzi; Darshika G. Perera (SoCC, 2018)

Efficient embedded architectures for fast-charge model predictive controller for battery cell management in electric vehicles. - Anne K. Madsen; Darshika G. Perera (EURASIP J. Embed. Syst., 2018)

HDL Code Optimizations: Impact on Hardware Implementations and CAD Tools. - S. Navid Shahrouzi; Darshika G. Perera (PACRIM, 2019)

Efficient FPGA-Based Reconfigurable Accelerators for SIMON Cryptographic Algorithm on Embedded Platforms. - Arkan Alkamil; Darshika G. Perera (ReConFig, 2019)

A Fast and Secure Pipelined Barrel Processor for Safety-Critical Applications for Real-Time Operating Systems. - Mong Tee Sim; Darshika G. Perera (UEMCON, 2019)

A design methodology for mobile and embedded applications on FPGA-based dynamic reconfigurable hardware. - Darshika G. Perera; Kin Fun Li (Int. J. Embed. Syst., 2019)

Optimized hardware accelerators for data mining applications on embedded platforms: Case study principal component analysis. - S. Navid Shahrouzi; Darshika G. Perera (Microprocess. Microsystems, 2019)

A Quad Joint Relational Feature for 3D Skeletal Action Recognition with Circular CNNs. - P. V. V. Kishore; Darshika G. Perera; Maddala Teja Kiran Kumar; Dande Anil Kumar; Kiran Kumar Eepuri (ISCAS, 2020)

An Optimized FPGA-Based Hardware Accelerator for Physics-Based EKF for Battery Cell Management. - Anne K. Madsen; Michael Scott Trimboli; Darshika G. Perera (ISCAS, 2020)

Towards Dynamic and Partial Reconfigurable Hardware Architectures for Cryptographic Algorithms on Embedded Devices. - Arkan Alkamil; Darshika G. Perera (IEEE Access, 2020)

Towards Composing Optimized Bi-Directional Multi-Ported Memories for Next-Generation FPGAs. - S. Navid Shahrouzi; Arkan Alkamil; Darshika G. Perera (IEEE Access, 2020)

Intelligent Cognitive Radio Architecture Applying Machine Learning and Reconfigurability. - Jari Nurmi; Darshika G. Perera (NorCAS, 2021)

Composing Optimized Embedded Software Architectures for Physics-Based EKF-MPC Smart Sensor for Li-Ion Battery Cell Management. - Anne K. Madsen; Darshika G. Perera (Sensors, 2022)

Edge Computing-based Adaptive Machine Learning Model for Dynamic IoT Environment. - Muhammad Arif; Darshika G. Perera (ISCAS, 2023)

Optimizing Density-Based Ant Colony Stream Clustering Using FPGA-Based Hardware Accelerator. - Jeremy R. Graf; Darshika G. Perera (ISCAS, 2023)

A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices. - Srikanth Ramadurgam; Darshika G. Perera (ISCAS, 2023)

Toward Composing Efficient FPGA-Based Hardware Accelerators for Physics-Based Model Predictive Control Smart Sensor for HEV Battery Cell Management. - Anne K. Madsen; Darshika G. Perera (IEEE Access, 2023)

Neuromorphic Sentiment Analysis Using Spiking Neural Networks. - Raghavendra Kumar Chunduri; Darshika G. Perera (Sensors, 2023)

Land Cover Classification Using Landsat 7 Data for Land Sustainability. - K. Lavanya; Abhilasha Gondchar; Irene Maria Mathew; Sumitkumar Sarda; Ananda Kumar Subramanian; Anand Mahendran; Darshika G. Perera (Wirel. Pers. Commun., 2023)

An Effective Content Based Image Retrieval System Using Deep Learning Based Inception Model. - E. Ranjith; Latha Parthiban; Thamarai Pugazhendhi Latchoumi; Ananda Kumar Subramanian; Darshika G. Perera; Sangeetha Ramaswamy (Wirel. Pers. Commun., 2023)

HDL Code Variation: Impact on FPGA Performance Metrics and CAD Tools. - Ian D. Atwell; Darshika G. Perera (PACRIM, 2024)

Discrepancy in Execution Time: Static vs. Dynamic Reconfigurable Hardware. - Darshika G. Perera; Kin F. Li (PACRIM, 2024)

Composing Efficient Computational Models for Real-Time Processing on Next-Generation Edge-Computing Platforms. - Mokhles A. Mohsin; S. Navid Shahrouzi; Darshika G. Perera (IEEE Access, 2024)

Analysis of Generalized Hebbian Learning Algorithm for Neuromorphic Hardware Using Spinnaker. - Shivani Sharma; Darshika G. Perera (CoRR, 2024)

Wavelet Based Frequency Detection Using FPGAs. - Caleb Hill; Darshika G. Perera (CoRR, 2024)

FPGA-Based Hardware Architecture for Sequence Alignment by Genetic Algorithm. - Laura H. Garcia; Arkan Alkamil; Mokhles A. Mohsin; Johannes Menzel; Darshika G. Perera (ISCAS, 2025)