Design solutions for the Bulldozer 32nm SOI 2-core processor module in an 8-core CPU. - Tim C. Fischer; Srikanth Arekapudi; Eric Busta; Carl Dietz; Michael Golden; Scott Hilker; Aaron Horiuchi; Kevin A. Hurd; Dave Johnson 002; Hugh McIntyre; Samuel Naffziger; James Vinh; et al. (ISSCC, 2011)

4.8 A 28nm x86 APU optimized for power and area efficiency. - Kathryn Wilcox; David Akeson; Harry R. Fair III; Jim Farrell; Dave Johnson 002; Guhan Krishnan; Hugh McIntyre; Edward McLellan; Samuel Naffziger; Russell Schreiber; Sriram Sundaram; Jonathan White (ISSCC, 2015)

Carrizo: A High Performance, Energy Efficient 28 nm APU. - Benjamin Munger; David Akeson; Srikanth Arekapudi; Tom Burd; Harry R. Fair III; Jim Farrell; Dave Johnson 002; Guhan Krishnan; Hugh McIntyre; Edward McLellan; Samuel Naffziger; Russell Schreiber; et al. (IEEE J. Solid State Circuits, 2016)

3D V-Cache: the Implementation of a Hybrid-Bonded 64MB Stacked Cache for a 7nm x86-64 CPU. - John J. Wuu; Rahul Agarwal; Michael Ciraula; Carl Dietz; Brett Johnson; Dave Johnson 002; Russell Schreiber; Raja Swaminathan; Will Walker; Samuel Naffziger (ISSCC, 2022)

"Zen 4": The AMD 5nm 5.7GHz x86-64 Microprocessor Core. - Benjamin Munger; Kathy Wilcox; Jeshuah Sniderman; Chuck Tung; Brett Johnson; Russell Schreiber; Carson Henrion; Kevin Gillespie; Tom Burd; Harry R. Fair III; Dave Johnson 002; Jonathan White; et al. (ISSCC, 2023)