URSA: A Unified ReSource Allocator for Registers and Functional Units in VLIW Architectures. - David A. Berson; Rajiv Gupta 001; Mary Lou Soffa (Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, 1993)

Resource Spackling: A Framework for Integrating Register Allocation in Local and Global Schedulers. - David A. Berson; Rajiv Gupta 001; Mary Lou Soffa (IFIP PACT, 1994)

GURRR: A Global Unified Resource Requirements Representation. - David A. Berson; Rajiv Gupta 001; Mary Lou Soffa (Intermediate Representations Workshop, 1995)

Integrating Program Optimizations and Transformations with the Scheduling of Instruction Level Parallelism. - David A. Berson; Pohua P. Chang; Rajiv Gupta 001; Mary Lou Soffa (LCPC, 1996)

Path Profile Guided Partial Dead Code Elimation Using Predication. - Rajiv Gupta 001; David A. Berson; Jesse Zhixi Fang (IEEE PACT, 1997)

Resource-Sensitive Profile-Directed Data Flow Analysis for Code Optimization. - Rajiv Gupta 001; David A. Berson; Jesse Zhixi Fang (MICRO, 1997)

Path Profile Guided Partial Redundancy Elimination Using Speculation. - Rajiv Gupta 001; David A. Berson; Jesse Zhixi Fang (ICCL, 1998)

Integrated Instruction Scheduling and Register Allocation Techniques. - David A. Berson; Rajiv Gupta 001; Mary Lou Soffa (LCPC, 1998)