Implementation Techniques for Main Memory Database Systems. - David J. DeWitt; Randy H. Katz; Frank Olken; Leonard D. Shapiro; Michael Stonebraker; David A. Wood 001 (SIGMOD Conference, 1984)

Implementing A Cache Consistency Protocol. - Randy H. Katz; Susan J. Eggers; David A. Wood 001; Charles L. Perkins; Robert G. Sheldon (ISCA, 1985)

An In-Cache Address Translation Mechanism. - David A. Wood 001; Susan J. Eggers; Garth A. Gibson; Mark D. Hill; Joan M. Pendleton; Scott A. Ritchie; George S. Taylor; Randy H. Katz; David A. Patterson 001 (ISCA, 1986)

Supporting Reference and Dirty Bits in SPUR's Virtual Address Cache. - David A. Wood 001; Randy H. Katz (ISCA, 1989)

A VLSI chip set for a multiprocessor workstation. II. A memory management unit and cache controller. - Deog-Kyoon Jeong; David A. Wood 001; Garth A. Gibson; Susan J. Eggers; David A. Hodges; Randy H. Katz; David A. Patterson 001 (IEEE J. Solid State Circuits, 1989)

Verifying a Multiprocessor Cache Controller Using Random Test Generation. - David A. Wood 001; Garth A. Gibson; Randy H. Katz (IEEE Des. Test Comput., 1990)

Implementing Stack Simulation for Highly-Associative Memories. - Yul H. Kim; Mark D. Hill; David A. Wood 001 (SIGMETRICS, 1991)

A Model for Estimating Trace-Sample Miss Ratios. - David A. Wood 001; Mark D. Hill; Richard E. Kessler (SIGMETRICS, 1991)

Mechanisms for Cooperative Shared Memory. - David A. Wood 001; Satish Chandra 001; Babak Falsafi; Mark D. Hill; James R. Larus; Alvin R. Lebeck; James C. Lewis; Shubhendu S. Mukherjee; Subbarao Palacharla; Steven K. Reinhardt (ISCA, 1993)

Kernel Support for the Wisconsin Wind Tunnel. - Steven K. Reinhardt; Babak Falsafi; David A. Wood 001 (USENIX Microkernels and Other Kernel Architectures Symposium, 1993)

The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers. - Steven K. Reinhardt; Mark D. Hill; James R. Larus; Alvin R. Lebeck; James C. Lewis; David A. Wood 001 (SIGMETRICS, 1993)

Wisconsin Architectural Research Tool Set. - Mark D. Hill; James R. Larus; Alvin R. Lebeck; Madhusudhan Talluri; David A. Wood 001 (SIGARCH Comput. Archit. News, 1993)

Cooperative Shared Memory: Software and Hardware Support for Scalable Multiprocesors. - Mark D. Hill; James R. Larus; Steven K. Reinhardt; David A. Wood 001 (ACM Trans. Comput. Syst., 1993)

Fine-grain Access Control for Distributed Shared Memory. - Ioannis Schoinas; Babak Falsafi; Alvin R. Lebeck; Steven K. Reinhardt; James R. Larus; David A. Wood 001 (ASPLOS, 1994)

Cost/performance of a parallel computer simulator. - Babak Falsafi; David A. Wood 001 (PADS, 1994)

Application-specific protocols for user-level shared memory. - Babak Falsafi; Alvin R. Lebeck; Steven K. Reinhardt; Ioannis Schoinas; Mark D. Hill; James R. Larus; Anne Rogers; David A. Wood 001 (SC, 1994)

Cache Profiling and the SPEC Benchmarks: A Case Study. - Alvin R. Lebeck; David A. Wood 001 (Computer, 1994)

The Wisconsin Wind Tunnel project: an annotated bibliography. - Mark D. Hill; James R. Larus; David A. Wood 001 (SIGARCH Comput. Archit. News, 1994)

A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches. - Richard E. Kessler; Mark D. Hill; David A. Wood 001 (IEEE Trans. Computers, 1994)

Tempest: A Substrate for Portable Parallel Programs. - Mark D. Hill; James R. Larus; David A. Wood 001 (COMPCON, 1995)

Accuracy vs. performance in parallel simulation of interconnection networks. - Doug Burger; David A. Wood 001 (IPPS, 1995)

Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors. - Alvin R. Lebeck; David A. Wood 001 (ISCA, 1995)

Where Is Software Headed? A Virtual Roundtable. - Ted G. Lewis; Dave Power; Bertrand Meyer 001; Jack Grimes; Mike Potel; Ronald J. Vetter; Phillip A. Laplante; Wolfgang Pree; Gustav Pomberger; Mark D. Hill; James R. Larus; David A. Wood 001; et al. (Computer, 1995)

Cost-Effective Parallel Computing. - David A. Wood 001; Mark D. Hill (Computer, 1995)

The Tempest approach to distributed shared memory. - David A. Wood 001; Mark D. Hill; James R. Larus (ICCD, 1996)

Synchronization Hardware for Networks of Workstations: Performance vs. Cost. - Rahmat S. Hyder; David A. Wood 001 (International Conference on Supercomputing, 1996)

Coherent Network Interfaces for Fine-Grain Communication. - Shubhendu S. Mukherjee; Babak Falsafi; Mark D. Hill; David A. Wood 001 (ISCA, 1996)

Decoupled Hardware Support for Distributed Shared Memory. - Steven K. Reinhardt; Robert W. Pfile; David A. Wood 001 (ISCA, 1996)

Problems, Challenges and the Importance of Performance Evaluation. - David A. Wood 001 (ACM Comput. Surv., 1996)

Paging tradeoffs in distributed-shared-memory multiprocessors. - Doug Burger; Rahmat S. Hyder; Barton P. Miller; David A. Wood 001 (J. Supercomput., 1996)

Scheduling Communication on a SMP Node Parallel Machine. - Babak Falsafi; David A. Wood 001 (HPCA, 1997)

Reactive NUMA: A Design for Unifying S-COMA and CC-NUMA. - Babak Falsafi; David A. Wood 001 (ISCA, 1997)

Relaxed Consistency and Coherence Granularity in DSM Systems: A Performance Evaluation. - Yuanyuan Zhou 001; Liviu Iftode; Jaswinder Pal Singh; Kai Li 001; Brian R. Toonen; Ioannis Schoinas; Mark D. Hill; David A. Wood 001 (PPoPP, 1997)

Modeling Cost/Performance of a Parallel Computer Simulator. - Babak Falsafi; David A. Wood 001 (ACM Trans. Model. Comput. Simul., 1997)

Active Memory: A New Abstraction for Memory System Simulation. - Alvin R. Lebeck; David A. Wood 001 (ACM Trans. Model. Comput. Simul., 1997)

Sirocco: Cost-Effective Fine-Grain Distributed Shared Memory. - Ioannis Schoinas; Babak Falsafi; Mark D. Hill; James R. Larus; David A. Wood 001 (IEEE PACT, 1998)

Retrospective: Tempest and Typhoon: User-Level Shared Memory. - Steven K. Reinhardt; James R. Larus; David A. Wood 001 (25 Years ISCA: Retrospectives and Reprints, 1998)

Tempest and Typhoon: User-Level Shared Memory. - Steven K. Reinhardt; James R. Larus; David A. Wood 001 (25 Years ISCA: Retrospectives and Reprints, 1998)

Analytic Evaluation of Shared-memory Systems with ILP Processors. - Daniel J. Sorin; Vijay S. Pai; Sarita V. Adve; Mary K. Vernon; David A. Wood 001 (ISCA, 1998)

Hardware Support for Flexible Distributed Shared Memory. - Steven K. Reinhardt; Robert W. Pfile; David A. Wood 001 (IEEE Trans. Computers, 1998)

Parallel Dispatch Queue: A Queue-Based Programming Abstraction to Parallelize Fine-Grain Communication Protocols. - Babak Falsafi; David A. Wood 001 (HPCA, 1999)

Multicast Snooping: A New Coherence Method Using a Multicast Address Network. - E. Ender Bilir; Ross M. Dickson; Ying Hu; Manoj Plakal; Daniel J. Sorin; Mark D. Hill; David A. Wood 001 (ISCA, 1999)

DBMSs on a Modern Processor: Where Does Time Go? - Anastassia Ailamaki; David J. DeWitt; Mark D. Hill; David A. Wood 001 (VLDB, 1999)

Timestamp snooping: an approach for extending SMPs. - Milo M. K. Martin; Daniel J. Sorin; Anastassia Ailamaki; Alaa R. Alameldeen; Ross M. Dickson; Carl J. Mauer; Kevin E. Moore; Manoj Plakal; Mark D. Hill; David A. Wood 001 (ASPLOS, 2000)

Wisconsin Wind Tunnel II: a fast, portable parallel architecture simulator. - Shubhendu S. Mukherjee; Steven K. Reinhardt; Babak Falsafi; Mike Litzkow; Mark D. Hill; David A. Wood 001; Steven Huss-Lederman; James R. Larus (IEEE Concurr., 2000)

Bandwidth Adaptive Snooping. - Milo M. K. Martin; Daniel J. Sorin; Mark D. Hill; David A. Wood 001 (HPCA, 2002)

SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery. - Daniel J. Sorin; Milo M. K. Martin; Mark D. Hill; David A. Wood 001 (ISCA, 2002)

Full-system timing-first simulation. - Carl J. Mauer; Mark D. Hill; David A. Wood 001 (SIGMETRICS, 2002)

Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol. - Daniel J. Sorin; Manoj Plakal; Anne Condon; Mark D. Hill; Milo M. K. Martin; David A. Wood 001 (IEEE Trans. Parallel Distributed Syst., 2002)

Adaptive competitive self-organizing associative memory. - Ragu Athinarayanan; Mohammad R. Sayeh; David A. Wood 001 (IEEE Trans. Syst. Man Cybern. Part A, 2002)

Dynamic Verification of End-to-End Multiprocessor Invariants. - Daniel J. Sorin; Mark D. Hill; David A. Wood 001 (DSN, 2003)

Variability in Architectural Simulations of Multi-Threaded Workloads. - Alaa R. Alameldeen; David A. Wood 001 (HPCA, 2003)

Memory System Behavior of Java-Based Middleware. - Martin Karlsson; Kevin E. Moore; Erik Hagersten; David A. Wood 001 (HPCA, 2003)

Using Destination-Set Prediction to Improve the Latency/Bandwidth Tradeoff in Shared-Memory Multiprocessors. - Milo M. K. Martin; Pacia J. Harper; Daniel J. Sorin; Mark D. Hill; David A. Wood 001 (ISCA, 2003)

Token Coherence: Decoupling Performance and Correctness. - Milo M. K. Martin; Mark D. Hill; David A. Wood 001 (ISCA, 2003)

TLC: Transmission Line Caches. - Bradford M. Beckmann; David A. Wood 001 (MICRO, 2003)

Simulating a $2M Commercial Server on a $2K PC. - Alaa R. Alameldeen; Milo M. K. Martin; Carl J. Mauer; Kevin E. Moore; Min Xu; Mark D. Hill; David A. Wood 001; Daniel J. Sorin (Computer, 2003)

Addressing Workload Variability in Architectural Simulations. - Alaa R. Alameldeen; David A. Wood 001 (IEEE Micro, 2003)

Token Coherence: A New Framework for Shared-Memory Multiprocessors. - Milo M. K. Martin; Mark D. Hill; David A. Wood 001 (IEEE Micro, 2003)

Using Speculation to Simplify Multiprocessor Design. - Daniel J. Sorin; Milo M. K. Martin; Mark D. Hill; David A. Wood 001 (IPDPS, 2004)

Adaptive Cache Compression for High-Performance Processors. - Alaa R. Alameldeen; David A. Wood 001 (ISCA, 2004)

Managing Wire Delay in Large Chip-Multiprocessor Caches. - Bradford M. Beckmann; David A. Wood 001 (MICRO, 2004)

Improving Multiple-CMP Systems Using Token Coherence. - Michael R. Marty; Jesse D. Bingham; Mark D. Hill; Alan J. Hu; Milo M. K. Martin; David A. Wood 001 (HPCA, 2005)

Exploring Processor Design Options for Java-Based Middleware. - Martin Karlsson; Erik Hagersten; Kevin E. Moore; David A. Wood 001 (ICPP, 2005)

Evaluating scheduling policies for fine-grain communication protocols on a cluster of SMPs. - Babak Falsafi; David A. Wood 001 (J. Parallel Distributed Comput., 2005)

Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset. - Milo M. K. Martin; Daniel J. Sorin; Bradford M. Beckmann; Michael R. Marty; Min Xu; Alaa R. Alameldeen; Kevin E. Moore; Mark D. Hill; David A. Wood 001 (SIGARCH Comput. Archit. News, 2005)

Keynote talk challenges in chip multiprocessor memory systems. - David A. Wood 001 (Memory System Performance and Correctness, 2006)

Supporting nested transactional memory in logTM. - Michelle J. Moravan; Jayaram Bobba; Kevin E. Moore; Luke Yen; Mark D. Hill; Ben Liblit; Michael M. Swift; David A. Wood 001 (ASPLOS, 2006)

LogTM: log-based transactional memory. - Kevin E. Moore; Jayaram Bobba; Michelle J. Moravan; Mark D. Hill; David A. Wood 001 (HPCA, 2006)

ASR: Adaptive Selective Replication for CMP Caches. - Bradford M. Beckmann; Michael R. Marty; David A. Wood 001 (MICRO, 2006)

IPC Considered Harmful for Multiprocessor Workloads. - Alaa R. Alameldeen; David A. Wood 001 (IEEE Micro, 2006)

A Case for Deconstructing Hardware Transactional Memory Systems. - Mark D. Hill; Derek Hower; Kevin E. Moore; Michael M. Swift; Haris Volos 001; David A. Wood 001 (Programming Models for Ubiquitous Parallelism, 2007)

Interactions Between Compression and Prefetching in Chip Multiprocessors. - Alaa R. Alameldeen; David A. Wood 001 (HPCA, 2007)

LogTM-SE: Decoupling Hardware Transactional Memory from Caches. - Luke Yen; Jayaram Bobba; Michael R. Marty; Kevin E. Moore; Haris Volos 001; Mark D. Hill; Michael M. Swift; David A. Wood 001 (HPCA, 2007)

TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory. - Jayaram Bobba; Neelam Goyal; Mark D. Hill; Michael M. Swift; David A. Wood 001 (ISCA, 2008)

Performance Pathologies in Hardware Transactional Memory. - Jayaram Bobba; Kevin E. Moore; Haris Volos 001; Luke Yen; Mark D. Hill; Michael M. Swift; David A. Wood 001 (IEEE Micro, 2008)

StealthTest: Low Overhead Online Software Testing Using Transactional Memory. - Jayaram Bobba; Weiwei Xiong; Luke Yen; Mark D. Hill; David A. Wood 001 (PACT, 2009)

Forwardflow: a scalable core for power-constrained CMPs. - Dan Gibson; David A. Wood 001 (ISCA, 2010)

WiDGET: Wisconsin decoupled grid execution tiles. - Yasuko Watanabe; John D. Davis; David A. Wood 001 (ISCA, 2010)

Safe and efficient supervised memory systems. - Jayaram Bobba; Marc Lupon; Mark D. Hill; David A. Wood 001 (HPCA, 2011)

Calvin: Deterministic or not? Free will to choose. - Derek Hower; Polina Dudnik; Mark D. Hill; David A. Wood 001 (HPCA, 2011)

The gem5 simulator. - Nathan L. Binkert; Bradford M. Beckmann; Gabriel Black; Steven K. Reinhardt; Ali G. Saidi; Arkaprava Basu; Joel Hestness; Derek Hower; Tushar Krishna; Somayeh Sardashti; Rathijit Sen; Korey Sewell; et al. (SIGARCH Comput. Archit. News, 2011)

A Primer on Memory Consistency and Cache Coherence - Daniel J. Sorin; Mark D. Hill; David A. Wood 001 (Morgan & Claypool Publishers, 2011)

UniFI: leveraging non-volatile memories for a unified fault tolerance and idle power management technique. - Somayeh Sardashti; David A. Wood 001 (ICS, 2012)

Something old and something new: P-states can borrow microarchitecture techniques too. - Yasuko Eckert; Srilatha Manne; Michael J. Schulte; David A. Wood 001 (ISLPED, 2012)

Heterogeneous system coherence for integrated CPU-GPU systems. - Jason Power; Arkaprava Basu; Junli Gu; Sooraj Puthoor; Bradford M. Beckmann; Mark D. Hill; Steven K. Reinhardt; David A. Wood 001 (MICRO, 2013)

Decoupled compressed cache: exploiting spatial locality for energy-optimized compressed caching. - Somayeh Sardashti; David A. Wood 001 (MICRO, 2013)

Reuse-based online models for caches. - Rathijit Sen; David A. Wood 001 (SIGMETRICS, 2013)

Optimization and Mathematical Modeling in Computer Architecture - Tony Nowatzki; Michael C. Ferris; Karu Sankaralingam; Cristian Estan; Nilay Vaish; David A. Wood 001 (Morgan & Claypool Publishers, 2013)

Heterogeneous-race-free memory models. - Derek R. Hower; Blake A. Hechtman; Bradford M. Beckmann; Benedict R. Gaster; Mark D. Hill; Steven K. Reinhardt; David A. Wood 001 (ASPLOS, 2014)

Resolved: specialized architectures, languages, and system software should supplant general-purpose alternatives within a decade. - David A. Wood 001 (ASPLOS, 2014)

QuickRelease: A throughput-oriented approach to release consistency on GPUs. - Blake A. Hechtman; Shuai Che; Derek R. Hower; Yingying Tian; Bradford M. Beckmann; Mark D. Hill; Steven K. Reinhardt; David A. Wood 001 (HPCA, 2014)

Supporting x86-64 address translation for 100s of GPU lanes. - Jason Power; Mark D. Hill; David A. Wood 001 (HPCA, 2014)

A comparative analysis of microarchitecture effects on CPU and GPU memory system behavior. - Joel Hestness; Stephen W. Keckler; David A. Wood 001 (IISWC, 2014)

Fine-grain task aggregation and coordination on GPUs. - Marc S. Orr; Bradford M. Beckmann; Steven K. Reinhardt; David A. Wood 001 (ISCA, 2014)

Skewed Compressed Caches. - Somayeh Sardashti; André Seznec; David A. Wood 001 (MICRO, 2014)

Decoupled Compressed Cache: Exploiting Spatial Locality for Energy Optimization. - Somayeh Sardashti; David A. Wood 001 (IEEE Micro, 2014)

Synchronization Using Remote-Scope Promotion. - Marc S. Orr; Shuai Che; Ayse Yilmazer; Bradford M. Beckmann; Mark D. Hill; David A. Wood 001 (ASPLOS, 2015)

Toward GPUs being mainstream in analytic processing: An initial argument using simple scan-aggregate queries. - Jason Power; Yinan Li; Mark D. Hill; Jignesh M. Patel; David A. Wood 001 (DaMoN, 2015)

GPU Computing Pipeline Inefficiencies and Optimization Opportunities in Heterogeneous CPU-GPU Processors. - Joel Hestness; Stephen W. Keckler; David A. Wood 001 (IISWC, 2015)

Border control: sandboxing accelerators. - Lena E. Olson; Jason Power; Mark D. Hill; David A. Wood 001 (MICRO, 2015)

gem5-gpu: A Heterogeneous CPU-GPU Simulator. - Jason Power; Joel Hestness; Marc S. Orr; Mark D. Hill; David A. Wood 001 (IEEE Comput. Archit. Lett., 2015)

LogCA: A Performance Model for Hardware Accelerators. - Muhammad Shoaib Bin Altaf; David A. Wood 001 (IEEE Comput. Archit. Lett., 2015)

Implications of Emerging 3D GPU Architecture on the Scan Primitive. - Jason Power; Yinan Li; Mark D. Hill; Jignesh M. Patel; David A. Wood 001 (SIGMOD Rec., 2015)

A Primer on Compression in the Memory Hierarchy - Somayeh Sardashti; Angelos Arelakis; Per Stenström; David A. Wood 001 (Morgan & Claypool Publishers, 2015)

Lazy release consistency for GPUs. - Johnathan Alsop; Marc S. Orr; Bradford M. Beckmann; David A. Wood 001 (MICRO, 2016)

GPGPU Footprint Models to Estimate per-Core Power. - Rathijit Sen; David A. Wood 001 (IEEE Comput. Archit. Lett., 2016)

21st Century Computer Architecture. - Mark D. Hill; Sarita V. Adve; Luis Ceze; Mary Jane Irwin; David R. Kaeli; Margaret Martonosi; Josep Torrellas; Thomas F. Wenisch; David A. Wood 001; Katherine A. Yelick (CoRR, 2016)

When to use 3D Die-Stacked Memory for Bandwidth-Constrained Big Data Workloads. - Jason Lowe-Power; Mark D. Hill; David A. Wood 001 (CoRR, 2016)

Yet Another Compressed Cache: A Low-Cost Yet Effective Compressed Cache. - Somayeh Sardashti; André Seznec; David A. Wood 001 (ACM Trans. Archit. Code Optim., 2016)

Optimization Models for Three On-Chip Network Problems. - Nilay Vaish; Michael C. Ferris; David A. Wood 001 (ACM Trans. Archit. Code Optim., 2016)

Crossing Guard: Mediating Host-Accelerator Coherence Interactions. - Lena E. Olson; Mark D. Hill; David A. Wood 001 (ASPLOS, 2017)

LogCA: A High-Level Performance Model for Hardware Accelerators. - Muhammad Shoaib Bin Altaf; David A. Wood 001 (ISCA, 2017)

Gravel: fine-grain GPU-initiated network messages. - Marc S. Orr; Shuai Che; Bradford M. Beckmann; Mark Oskin; Steven K. Reinhardt; David A. Wood 001 (SC, 2017)

Energy-Proportional Computing: A New Definition. - Rathijit Sen; David A. Wood 001 (Computer, 2017)

Could Compression Be of General Use? Evaluating Memory Compression across Domains. - Somayeh Sardashti; David A. Wood 001 (ACM Trans. Archit. Code Optim., 2017)

Pareto Governors for Energy-Optimal Computing. - Rathijit Sen; David A. Wood 001 (ACM Trans. Archit. Code Optim., 2017)

Independent Forward Progress of Work-groups. - Alexandru Dutu; Matthew D. Sinclair; Bradford M. Beckmann; David A. Wood 001; Marcus Chow (ISCA, 2020)

The gem5 Simulator: Version 20.0+. - Jason Lowe-Power; Abdul Mutaal Ahmad; Ayaz Akram; Mohammad Alian; Rico Amslinger; Matteo Andreozzi; Adrià Armejach; Nils Asmussen; Srikant Bharadwaj; Gabe Black; Gedare Bloom; Bobby R. Bruce; et al. (CoRR, 2020)

A Primer on Memory Consistency and Cache Coherence, Second Edition - Vijay Nagarajan; Daniel J. Sorin; Mark D. Hill; David A. Wood 001 (A Primer on Memory Consistency and Cache Coherence (2nd Ed.), 2020)

Byte-Select Compression. - Matthew Tomei; Shomit Das; Mohammad Seyedzadeh; Philip Bedoukian; Bradford M. Beckmann; Rakesh Kumar 002; David A. Wood 001 (ACM Trans. Archit. Code Optim., 2021)