Dynamic hardware plugins in an FPGA with partial run-time reconfiguration. - Edson L. Horta; John W. Lockwood; David E. Taylor; David B. Parlour (DAC, 2002)

Scalable IP Lookup for Programmable Routers. - David E. Taylor; John W. Lockwood; Todd S. Sproull; Jonathan S. Turner; David B. Parlour (INFOCOM, 2002)

Scalable IP lookup for Internet routers. - David E. Taylor; Jonathan S. Turner; John W. Lockwood; Todd S. Sproull; David B. Parlour (IEEE J. Sel. Areas Commun., 2003)

Automatic software synthesis of dataflow program: An MPEG-4 simple profile decoder case study. - Ghislain Roquier; Matthieu Wipliez; Mickaël Raulet; Jörn W. Janneck; Ian D. Miller; David B. Parlour (SiPS, 2008)

An Integrated Environment for HW/SW Co-design based on a CAL Specification and HW/SW Code Generators. - Ghislain Roquier; Christophe Lucarz; Marco Mattavelli; Matthieu Wipliez; Mickaël Raulet; Jörn W. Janneck; Ian D. Miller; David B. Parlour (ISCAS, 2009)

Synthesizing Hardware from Dataflow Programs - An MPEG-4 Simple Profile Decoder Case Study. - Jörn W. Janneck; Ian D. Miller; David B. Parlour; Ghislain Roquier; Matthieu Wipliez; Mickaël Raulet (J. Signal Process. Syst., 2011)