A family of high-swing CMOS operational amplifiers. - Terri S. Fiez; Howard C. Yang; John J. Yang; Choung Yu; David J. Allstot (IEEE J. Solid State Circuits, 1989)

Modeling of frequency and temperature effects in GaAs MESFETs. - Philip C. Canfield; Steven C. F. Lam; David J. Allstot (IEEE J. Solid State Circuits, 1990)

A p-well GaAs MESFET technology for mixed-mode applications. - Philip C. Canfield; David J. Allstot (IEEE J. Solid State Circuits, 1990)

CMOS switched-current ladder filters. - Terri S. Fiez; David J. Allstot (IEEE J. Solid State Circuits, 1990)

Switched-current circuit design issues. - Terri S. Fiez; Guojin Liang; David J. Allstot (IEEE J. Solid State Circuits, 1991)

Synthesis techniques for CMOS folded source-coupled logic circuits. - Sailesh R. Maskai; Sayfe Kiaei; David J. Allstot (IEEE J. Solid State Circuits, 1992)

A unified approach to simulating electrical and thermal substrate coupling interactions in ICs. - Nishath K. Verghese; Sang-Soo Lee; David J. Allstot (ICCAD, 1993)

A 3V-125 MHz CMOS Continuous-time Filter. - Rajesh H. Zele; Sang-Soo Lee; David J. Allstot (ISCAS, 1993)

CMOS continuous-time current-mode filters for high-frequency applications. - Sang-Soo Lee; Rajesh H. Zele; David J. Allstot; Guojin Liang (IEEE J. Solid State Circuits, 1993)

Sizing of cell-level analog circuits using constrained optimization techniques. - Prabir C. Maulik; L. Richard Carley; David J. Allstot (IEEE J. Solid State Circuits, 1993)

Fully balanced CMOS current-mode circuits. - Rajesh H. Zele; David J. Allstot; Terri S. Fiez (IEEE J. Solid State Circuits, 1993)

Electrothermal simulation of integrated circuits. - Sang-Soo Lee; David J. Allstot (IEEE J. Solid State Circuits, 1993)

Forum: From 100 Milliwatts/MIPS to 10 Microwatts/MIPS. - Eby G. Friedman; Sung-Mo Kang; Eric A. Vittoz; David J. Allstot; Erik P. Harris; Ran-Hong Yan (ISCAS, 1994)

Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis. - Balsha R. Stanisic; Nishath K. Verghese; Rob A. Rutenbar; L. Richard Carley; David J. Allstot (IEEE J. Solid State Circuits, 1994)

Low-voltage fully differential switched-current filters. - Rajesh H. Zele; David J. Allstot (IEEE J. Solid State Circuits, 1994)

SUBTRACT: a program for the efficient evaluation of substrate parasitics in integrated circuits. - Nishath K. Verghese; David J. Allstot (ICCAD, 1995)

Low-Power High-Speed Continuous-Time Sigma-Delta Modulators. - Rohit Mittal; David J. Allstot (ISCAS, 1995)

High-Speed CMOS Current-Mode Equalizers. - Joshua C. Park; Rohit Mittal; Kimberly C. Bracken; L. Richard Carley; David J. Allstot (ISCAS, 1995)

A Macromodel Compaction Scheme for the Fast Stimulation of Large Linear Mesh Circuits. - Nishath K. Verghese; David J. Allstot (ISCAS, 1995)

Substrate-aware mixed-signal macrocell placement in WRIGHT. - Sujoy Mitra; Rob A. Rutenbar; L. Richard Carley; David J. Allstot (IEEE J. Solid State Circuits, 1995)

An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC. - Katsufumi Nakamura; Masso Hotta; L. Richard Carley; David J. Allstot (IEEE J. Solid State Circuits, 1995)

CMOS folding A/D converters with current-mode interpolation. - Michael P. Flynn; David J. Allstot (IEEE J. Solid State Circuits, 1996)

Verification techniques for substrate coupling and their application to mixed-signal IC design. - Nishath K. Verghese; David J. Allstot; Mark A. Wolfe (IEEE J. Solid State Circuits, 1996)

Low-power CMOS continuous-time filters. - Rajesh H. Zele; David J. Allstot (IEEE J. Solid State Circuits, 1996)

Charge-pump assisted low-power/low-voltage CMOS opamp design. - Jianjun Zhou; Ramsin M. Ziazadeh; H.-H. Ng; Hiok-Tiaq Ng; David J. Allstot (ISLPED, 1997)

A low-power backward equalizer for DFE read-channel applications. - Rohit Mittal; Kimberly C. Bracken; L. Richard Carley; David J. Allstot (IEEE J. Solid State Circuits, 1997)

CMOS current steering logic for low-voltage mixed-signal integrated circuits. - Hiok-Tiaq Ng; David J. Allstot (IEEE Trans. Very Large Scale Integr. Syst., 1997)

A multistage amplifier topology with embedded tracking compensation. - Ramsin M. Ziazadeh; Hiok-Tiaq Ng; David J. Allstot (CICC, 1998)

Computer-aided design considerations for mixed-signal coupling in RF integrated circuits. - Nishath K. Verghese; David J. Allstot (IEEE J. Solid State Circuits, 1998)

Monolithic transformers and their application in a differential CMOS RF low-noise amplifier. - Jianjun Zhou; David J. Allstot (IEEE J. Solid State Circuits, 1998)

Noise considerations for mixed-signal RF IC transceivers. - Sayfe Kiaei; David J. Allstot; Ken Hansen; Nishath K. Verghese (Wirel. Networks, 1998)

Fully monolithic CMOS RF power amplifiers: recent advances. - Ravi Gupta; David J. Allstot (IEEE Commun. Mag., 1999)

A multistage amplifier technique with embedded frequency compensation. - Hiok-Tiaq Ng; Ramsin M. Ziazadeh; David J. Allstot (IEEE J. Solid State Circuits, 1999)

Addition to "Monolithic transformers and their application in a differential CMOS RF low-noise amplifier". - Jianjun Zhou; David J. Allstot (IEEE J. Solid State Circuits, 1999)

A low-jitter 1.9-V CMOS PLL for UltraSPARC microprocessor applications. - Hee-Tae Ahn; David J. Allstot (IEEE J. Solid State Circuits, 2000)

A fully integrated 0.5-5.5 GHz CMOS distributed amplifier. - Brian M. Ballweber; Ravi Gupta; David J. Allstot (IEEE J. Solid State Circuits, 2000)

Correction to "A fully integrated 0.5 - 5.5-GHz CMOS distributed amplifier". - Brian M. Ballweber; Ravi Gupta; David J. Allstot (IEEE J. Solid State Circuits, 2000)

Design and optimization of CMOS RF power amplifiers. - Ravi Gupta; Brian M. Ballweber; David J. Allstot (IEEE J. Solid State Circuits, 2001)

Parasitic-aware synthesis of RF CMOS switching power amplifiers. - Kiyong Choi; David J. Allstot; Sayfe Kiaei (ISCAS (1), 2002)

A 2 GHz CMOS even harmonic mixer for direct conversion receivers. - Sher Jiun Fang; See Taur Lee; David J. Allstot; Abdellatif Bellaouar (ISCAS (4), 2002)

Matching considerations in I/Q A/D converter pairs. - Charles T. Peach; Waisiu Law; D. R. Beck; Ward J. Helms; David J. Allstot (ISCAS (3), 2002)

Class AB-D-G line driver for central office asymmetric digital subscriber line systems. - J. Shorb; David J. Allstot; R. Roze (ISCAS (5), 2002)

A 0.5-8.5 GHz fully differential CMOS distributed amplifier. - Hee-Tae Ahn; David J. Allstot (IEEE J. Solid State Circuits, 2002)

Parasitic-aware design and optimization of a fully integrated CMOS wideband amplifier. - Jinho Park 006; Kiyong Choi; David J. Allstot (ASP-DAC, 2003)

An 8-bit, 1.8 V, 20 MSample/s analog-to-digital converter using low gain opamps. - D. R. Beck; David J. Allstot; D. Garrity (ISCAS (1), 2003)

A mixed-signal calibration technique for low-voltage CMOS 1.5-bit/stage pipeline data converters. - Jianjun Guo; Waisiu Law; Charles T. Peach; Ward J. Helms; David J. Allstot (ISCAS (1), 2003)

Accurate compact model extraction for on-chip coplanar waveguides. - Taeik Kim; Xiaoyong Li 001; David J. Allstot (ISCAS (4), 2003)

A symmetric miniature 3D inductor. - Srinivas Kodali; David J. Allstot (ISCAS (1), 2003)

On-chip inductor structures: a comparative study. - Srinivas Kodali; Taeik Kim; David J. Allstot (ISCAS (1), 2003)

A monotonic digital calibration technique for pipelined data converters. - Waisiu Law; Jianjun Guo; Charles T. Peach; Ward J. Helms; David J. Allstot (ISCAS (1), 2003)

A resonant pad for ESD protected narrowband CMOS RF applications. - J. Shorb; Xiaoyong Li 001; David J. Allstot (ISCAS (1), 2003)

NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO. - Min Chu; David J. Allstot; Jeffrey M. Huard; Kim Y. Wong (ASP-DAC, 2004)

Measurement and modeling of noise parameters for desensitized low noise amplifiers. - Gaurab Banerjee; David T. Becher; Celia Hung; David J. Allstot; Krishnamurthy Soumyanath (CICC, 2004)

Desensitized design of MOS low noise amplifiers by Rn minimization. - Gaurab Banerjee; David T. Becher; Celia Hung; Krishnamurthy Soumyanath; David J. Allstot (ICECS, 2004)

A 6 GHz low-noise quadrature Colpitts VCO. - Min Chu; David J. Allstot (ICECS, 2004)

Design considerations for anti-phase injected quadrature voltage controlled oscillators. - Min Chu; Sudip Shekhar; David J. Allstot; Tarun Kanti Bhattacharyya (ICECS, 2004)

A lateral-BJT-biased CMOS voltage-controlled oscillator. - Sankaran Aniruddhan; Min Chu; David J. Allstot (ISCAS (1), 2004)

Post-optimization design centering for RF integrated circuits. - Kiyong Choi; David J. Allstot (ISCAS (1), 2004)

A tunable transmission line phase shifter (TTPS). - Taeik Kim; David J. Allstot (ISCAS (1), 2004)

RF circuit synthesis using particle swarm optimization. - Jinho Park 006; David J. Allstot (ISCAS (5), 2004)

A 12.5 GHz RF matrix amplifier in 180nm SOI CMOS. - Jinho Park 006; David J. Allstot (ISCAS (1), 2004)

A quad-band GSM-GPRS transmitter with digital auto-calibration. - See Taur Lee; Sher Jiun Fang; David J. Allstot; Abdellatif Bellaouar; Ahmed R. Fridi; Paul Fontaine (IEEE J. Solid State Circuits, 2004)

Compact model generation for on-chip transmission lines. - Taeik Kim; Xiaoyong Li 001; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Parasitic-aware RF circuit design and optimization. - Jinho Park 006; Kiyong Choi; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Digital calibration for monotonic pipelined A/D converters. - Jianjun Guo; Waisiu Law; Ward J. Helms; David J. Allstot (IEEE Trans. Instrum. Meas., 2004)

An elitist distributed particle swarm algorithm for RF IC optimization. - Min Chu; David J. Allstot (ASP-DAC, 2005)

Phase-locked loop synthesis using hierarchical divide-and-conquer multi-optimization. - Min Chu; David J. Allstot (ASP-DAC, 2005)

A 9-b 400 Msample/s pipelined analog-to digital converter in 90nm CMOS. - Charles T. Peach; Ashoke Ravi; Rosie Bishop; Krishnamurthy Soumyanath; David J. Allstot (ESSCIRC, 2005)

Architectural issues in base-station frequency synthesizers. - Sankaran Aniruddhan; David J. Allstot (ISCAS (6), 2005)

A 360° extended range phase detector for type-I PLLs. - Cameron T. Charles; David J. Allstot (ISCAS (6), 2005)

Design considerations for a 10 GHz CMOS transmit-receive switch. - K. M. Naegle; Subhanshu Gupta; David J. Allstot (ISCAS (3), 2005)

A full-range all-pass variable phase shifter for multiple antenna receivers. - Hossein Zarei; Allan Ecker; Jinho Park 006; David J. Allstot (ISCAS (3), 2005)

Bridging Circuits and Electromagnetics in a Curriculum Aimed at Microelectronic Analog and Microwave Simulation and Design. - Vikram Jandhyala; Yasuo Kuga; David J. Allstot; Chuanjin Richard Shi (MSE, 2005)

Gm-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-μm CMOS. - Xiaoyong Li 001; Sudip Shekhar; David J. Allstot (IEEE J. Solid State Circuits, 2005)

A four-antenna receiver in 90-nm CMOS for beamforming and spatial diversity. - Jeyanandh Paramesh; Ralph Bishop; Krishnamurthy Soumyanath; David J. Allstot (IEEE J. Solid State Circuits, 2005)

A capacitor cross-coupled common-gate low-noise amplifier. - Wei Zhuo 003; Xiaoyong Li 001; Sudip Shekhar; Sherif H. K. Embabi; José Pineda de Gyvez; David J. Allstot; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

Elitist nondominated sorting genetic algorithm based RF IC optimizer. - Min Chu; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

A delay generation technique for fast-locking frequency synthesizers. - Sankaran Aniruddhan; Sudip Shekhar; David J. Allstot (ISCAS, 2006)

A 2-GHz integrated CMOS reflective-type phase shifter with 675° control range. - Cameron T. Charles; David J. Allstot (ISCAS, 2006)

A 2-GHz CMOS variable gain amplifier optimized for low noise. - Cameron T. Charles; David J. Allstot (ISCAS, 2006)

A variable-offset phase detector for phased-array applications. - Cameron T. Charles; David J. Allstot (ISCAS, 2006)

Analysis and design of lumped-element quadrature couplers with lossy passive elements. - Dicle Ozis; Jeyanandh Paramesh; David J. Allstot (ISCAS, 2006)

A fully-differential CMOS Clapp VCO for IEEE 802.11a applications. - Sudip Shekhar; Sankaran Aniruddhan; David J. Allstot (ISCAS, 2006)

Bandwidth Extension Techniques for CMOS Amplifiers. - Sudip Shekhar; Jeffrey S. Walling; David J. Allstot (IEEE J. Solid State Circuits, 2006)

Substrate Noise Coupling in SoC Design: Modeling, Avoidance, and Validation. - Ali Afzali-Kusha; Makoto Nagata; Nishath K. Verghese; David J. Allstot (Proc. IEEE, 2006)

A Calibrated Phase/Frequency Detector for Reference Spur Reduction in Charge-Pump PLLs. - Cameron T. Charles; David J. Allstot (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Parasitic-aware design and optimization of a CMOS RF power amplifier. - Kiyong Choi; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

Analysis of the Bridged T-Coil Circuit Using the Extra-Element Theorem. - Jeyanandh Paramesh; David J. Allstot (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

A matrix amplifier in 0.18-μm SOI CMOS. - Jinho Park 006; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

A Parallel, Multi-Resolution Sensing Technique for Multiple Antenna Cognitive Radios. - Nathan M. Neihart; Sumit Roy 001; David J. Allstot (ISCAS, 2007)

A Digital-Summing Feedforward Sigma-Delta Modulator and its Application to a Cascade ADC. - Yi Tang; Subhanshu Gupta; Jeyanandh Paramesh; David J. Allstot (ISCAS, 2007)

Monolithic Spiral Transformers: A Design Methodology. - Jeffrey S. Walling; David J. Allstot (ISCAS, 2007)

Reflective-Type Phase Shifters for Multiple-Antenna Transceivers. - Hossein Zarei; Cameron T. Charles; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Twisted inductors for low coupling mixed-signal and RF applications. - Nathan M. Neihart; David J. Allstot; Matt Miller; Pat Rakers (CICC, 2008)

A buffered charge pump with zero charge sharing. - Cameron T. Charles; David J. Allstot (ISCAS, 2008)

Hybrid modeling techniques for low OSR cascade continuous-time SigmaDelta modulators. - Subhanshu Gupta; Yi Tang; David J. Allstot; Jeyanandh Paramesh (ISCAS, 2008)

A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS. - Frank O'Mahony; Sudip Shekhar; Mozhgan Mansuri; Ganesh Balamurugan; James E. Jaussi; Joseph T. Kennedy; Bryan Casper; David J. Allstot; Randy Mooney (ISSCC, 2008)

A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation. - Jeffrey S. Walling; Hasnain Lakdawala; Yorgos Palaskas; Ashoke Ravi; Ofir Degani; Krishnamurthy Soumyanath; David J. Allstot (ISSCC, 2008)

CMOS VCO and LNA Using Tuned-Input Tuned-Output Circuits. - Sudip Shekhar; Jeffrey S. Walling; Sankaran Aniruddhan; David J. Allstot (IEEE J. Solid State Circuits, 2008)

Desensitized CMOS Low-Noise Amplifiers. - Gaurab Banerjee; Krishnamurthy Soumyanath; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Cascaded Complex ADCs With Adaptive Digital Calibration for I/Q Mismatch. - Yi Tang; Kuang-Wei Cheng; Subhanshu Gupta; Jeyanandh Paramesh; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Wideband CMOS Amplifier Design: Time-Domain Considerations. - Jeffrey S. Walling; Sudip Shekhar; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Twisted Transformers for Low Coupling RF and Mixed Signal Applications. - Nathan M. Neihart; David J. Allstot; Matt Miller; Pat Rakers (ISCAS, 2009)

A 7.2mW quadrature GPS receiver in 0.13µm CMOS. - Kuang-Wei Cheng; Karthik Natarajan; David J. Allstot (ISSCC, 2009)

Integrated Quadrature Couplers and Their Application in Image-Reject Receivers. - Dicle Ozis; Jeyanandh Paramesh; David J. Allstot (IEEE J. Solid State Circuits, 2009)

A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS. - Jeffrey S. Walling; Hasnain Lakdawala; Yorgos Palaskas; Ashoke Ravi; Ofir Degani; Krishnamurthy Soumyanath; David J. Allstot (IEEE J. Solid State Circuits, 2009)

A Class-G Supply Modulator and Class-E PA in 130 nm CMOS. - Jeffrey S. Walling; Stewart S. Taylor; David J. Allstot (IEEE J. Solid State Circuits, 2009)

A Calibrated Phase and Amplitude Control System for a 1.9 GHz Phased-Array Transmitter Element. - Cameron T. Charles; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver. - Sudip Shekhar; Ganesh Balamurugan; David J. Allstot; Mozhgan Mansuri; James E. Jaussi; Randy Mooney; Joseph T. Kennedy; Bryan Casper; Frank O'Mahony (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A two-stage sensing technique for dynamic spectrum access. - Ling Luo 004; Nathan M. Neihart; Sumit Roy 001; David J. Allstot (IEEE Trans. Wirel. Commun., 2009)

A 1.6 mW 5.4 GHz transformer-feedback gm-boosted current-reuse LNA in 0.18/μm CMOS. - Daibashish Gangopadhyay; Sudip Shekhar; Jeffrey S. Walling; David J. Allstot (ISCAS, 2010)

A Mode-I/Mode-III UWB LNA with programmable gain and 20 dB WLAN blocker rejection in 130nm CMOS. - Subhanshu Gupta; Daibashish Gangopadhyay; David J. Allstot (ISCAS, 2010)

U-shaped slow-wave transmission lines in 0.18μm CMOS. - Heng-Chia Hsu; Kaushik Dasgupta; Nathan M. Neihart; Sudip Shekhar; Jeffrey S. Walling; David J. Allstot (ISCAS, 2010)

A Current Reuse Quadrature GPS Receiver in 0.13 μ m CMOS. - Kuang-Wei Cheng; Karthik Natarajan; David J. Allstot (IEEE J. Solid State Circuits, 2010)

An 11.1 mW 42 MS/s 10 b ADC With Two-Step Settling in 0.18 μ m CMOS. - Charles T. Peach; Un-Ku Moon; David J. Allstot (IEEE J. Solid State Circuits, 2010)

Linearizing CMOS Switching Power Amplifiers Using Supply Regulators. - Jeffrey S. Walling; David J. Allstot (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Towards greener wireless transmission: Efficient power amplifier design. - Karthik Natarajan; Sang-Min Yoo; David J. Allstot; Jeffrey S. Walling (IGCC, 2011)

Multi-rate polyphase DSP and LMS calibration schemes for oversampled data conversion systems. - Subhanshu Gupta; Yi Tang; Kuang-Wei Cheng; Jeyanandh Paramesh; David J. Allstot (ICASSP, 2011)

Compressed sensing reconstruction: Comparative study with applications to ECG bio-signals. - Anna M. R. Dixon; Emily G. Allstot; Andrew Y. Chen; Daibashish Gangopadhyay; David J. Allstot (ISCAS, 2011)

Analog Chirp Fourier Transform for high-resolution real-time wideband RF spectrum Analysis. - Daibashish Gangopadhyay; Andrew Y. Chen; David J. Allstot (ISCAS, 2011)

Compressive sampling of EMG bio-signals. - Aabeeya Salman; Emily G. Allstot; Andrew Y. Chen; Anna M. R. Dixon; Daibashish Gangopadhyay; David J. Allstot (ISCAS, 2011)

A switched-capacitor power amplifier for EER/polar transmitters. - Sang-Min Yoo; Jeffrey S. Walling; Eum Chan Woo; David J. Allstot (ISSCC, 2011)

A Switched-Capacitor RF Power Amplifier. - Sang-Min Yoo; Jeffrey S. Walling; Eum Chan Woo; Benjamin Jann; David J. Allstot (IEEE J. Solid State Circuits, 2011)

A CMOS 1.6 GHz Dual-Loop PLL With Fourth-Harmonic Mixing. - Sankaran Aniruddhan; Sudip Shekhar; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

A 2.4-GHz Extended-Range Type-I SigmaDelta Fractional-N Synthesizer With 1.8-MHz Loop Bandwidth and -110-dBc/Hz Phase Noise. - Sudip Shekhar; Daibashish Gangopadhyay; Eum Chan Woo; David J. Allstot (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A 1.1µW 2.1µVRMS input noise chopper-stabilized amplifier for bio-medical applications. - Christopher J. Mandic; Daibashish Gangopadhyay; David J. Allstot (ISCAS, 2012)

Digital power amplifier: A new way to exploit the switched-capacitor circuit. - Jeffrey S. Walling; Sang-Min Yoo; David J. Allstot (IEEE Commun. Mag., 2012)

Editorial. - David J. Allstot; Riccardo Rovatti; Gianluca Setti (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS. - Subhanshu Gupta; Daibashish Gangopadhyay; Hasnain Lakdawala; Jacques Christophe Rudell; David J. Allstot (IEEE J. Solid State Circuits, 2012)

Compressed Sensing System Considerations for ECG and EMG Wireless Biosensors. - Anna M. R. Dixon; Emily G. Allstot; Daibashish Gangopadhyay; David J. Allstot (IEEE Trans. Biomed. Circuits Syst., 2012)

Multi-rate Polyphase DSP and LMS Calibration Schemes for Oversampled ADCs. - Subhanshu Gupta; Yi Tang; Jeyanandh Paramesh; David J. Allstot (J. Signal Process. Syst., 2012)

A Class-G Switched-Capacitor RF Power Amplifier. - Sang-Min Yoo; Jeffrey S. Walling; Ofir Degani; Benjamin Jann; Ram Sadhwani; Jacques Christophe Rudell; David J. Allstot (IEEE J. Solid State Circuits, 2013)

Compressed Sensing Analog Front-End for Bio-Sensor Applications. - Daibashish Gangopadhyay; Emily G. Allstot; Anna M. R. Dixon; Karthik Natarajan; Subhanshu Gupta; David J. Allstot (IEEE J. Solid State Circuits, 2014)

DAC mismatch shaping for quadrature sigma-delta data converters. - Sandipan Kundu; Subhanshu Gupta; David J. Allstot; Jeyanandh Paramesh (MWSCAS, 2015)

Frequency-Channelized Mismatch-Shaped Quadrature Data Converters for Carrier Aggregation in MU-MIMO LTE-A. - Sandipan Kundu; Subhanshu Gupta; David J. Allstot; Jeyanandh Paramesh (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A Two-Stage CMOS OTA with Load-Pole Cancellation. - Ajmal Vadakkan Kayyil; Pavan Kumar Ramakrishna; OnnLim Yong; David J. Allstot; Howard C. Yang (ISCAS, 2019)

Low-Voltage Tracking RC Frequency Compensation in Two-Stage Operational Amplifiers*. - Yu-Wen Kuo; Pavan Kumar Ramakrishna; Ajmal Vadakkan Kayyil; David J. Allstot (MWSCAS, 2019)

gm/ID Design Considerations for Subthreshold-Based CMOS Two-Stage Operational Amplifiers. - Chaiyanut Aueamnuay; Ajmal Vadakkan Kayyil; Jialin Liu 005; Narayana Bhagirath Thota; David J. Allstot (ISCAS, 2020)

gm/ID-Based Frequency Compensation of CMOS Two-Stage Operational Amplifiers. - Chaiyanut Aueamnuay; Ajmal Vadakkan Kayyil; Narayana Bhagirath Thota; Praveen Kumar Venkatachala; David J. Allstot (ISCAS, 2020)

Transformer-Combining Digital PA with Efficiency Peaking at 0, -6, and -12 dB Backoff in 32nm CMOS. - Parmoon Seddighrad; Yorgos Palaskas; Hongtao Xu; Paolo Madoglio; Kailash Chandrashekar; David J. Allstot (ISCAS, 2020)

10.7 A 0.26mm2 DPD-Less Quadrature Digital Transmitter With 30dB Pout Range in 65nm CMOS. - Si-Wook Yoo; Shih-Chang Hung; Jeffrey S. Walling; David J. Allstot; Sang-Min Yoo (ISSCC, 2020)

Windowed Integration Sampling in Bio-Signal Front-End Design. - Jialin Liu 005; David J. Allstot (MWSCAS, 2020)

A Switched-Capacitor Closed-Loop Integration Sampling Front-End for Peripheral Nerve Recording. - Jialin Liu 005; David J. Allstot (BioCAS, 2021)

Linearity Improvement Techniques for CMOS Switched-Capacitor Power Amplifiers. - Ajmal Vadakkan Kayyil; Bo Qiao 005; David J. Allstot (ISCAS, 2021)

Compressed Sensing Σ-Δ Modulators and Recovery Algorithm for Multi-Channel Bio-Signal Acquisition. - Jialin Liu 005; David J. Allstot (ISCAS, 2021)

I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner. - Bo Qiao 005; Ajmal Vadakkan Kayyil; Jeffrey S. Walling; David J. Allstot (ISCAS, 2021)

Switched-Capacitor Circuits. - David J. Allstot; Un-Ku Moon; Gabor C. Temes (CICC, 2022)

A Digitally Configurable Outphasing Switched-Capacitor-Based RF Transmitter. - Ajmal Vadakkan Kayyil; Bo Qiao 005; David J. Allstot (MWSCAS, 2023)

A Chopper-Stabilized Switched-Capacitor Front-End for Peripheral Nervous System Recording. - Jialin Liu 005; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Compressed Sensing Σ-Δ Modulators and a Recovery Algorithm for Multi-Channel Wireless Bio-Signal Acquisition. - Jialin Liu 005; David J. Allstot (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)