DVFS in loop accelerators using BLADES. - Ganesh S. Dasika; Shidhartha Das; Kevin Fan; Scott A. Mahlke; David M. Bull (DAC, 2008)

Razor II: In Situ Error Detection and Correction for PVT and SER Tolerance. - David T. Blaauw; Sudherssen Kalaiselvan; Kevin Lai; Wei-Hsiang Ma; Sanjay Pant; Carlos Tokunaga; Shidhartha Das; David M. Bull (ISSCC, 2008)

Addressing design margins through error-tolerant circuits. - Shidhartha Das; David T. Blaauw; David M. Bull; Krisztián Flautner; Rob Aitken (DAC, 2009)

RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance. - Shidhartha Das; Carlos Tokunaga; Sanjay Pant; Wei-Hsiang Ma; Sudherssen Kalaiselvan; Kevin Lai; David M. Bull; David T. Blaauw (IEEE J. Solid State Circuits, 2009)

A robust FIR filter with in situ error detection. - Paul N. Whatmough; Izzat Darwazeh; David M. Bull; Shidhartha Das; Danny Kershaw (ISCAS, 2010)

A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation. - David M. Bull; Shidhartha Das; Karthik Shivashankar; Ganesh S. Dasika; Krisztián Flautner; David T. Blaauw (ISSCC, 2010)

Error-resilient low-power DSP via path-delay shaping. - Paul N. Whatmough; Shidhartha Das; David M. Bull; Izzat Darwazeh (DAC, 2011)

A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation. - David M. Bull; Shidhartha Das; Karthik Shivashankar; Ganesh S. Dasika; Krisztián Flautner; David T. Blaauw (IEEE J. Solid State Circuits, 2011)

Correction to "A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation". - David M. Bull; Shidhartha Das; Karthik Shivashankar; Ganesh S. Dasika; Krisztián Flautner; David T. Blaauw (IEEE J. Solid State Circuits, 2011)

Selective time borrowing for DSP pipelines with hybrid voltage control loop. - Paul N. Whatmough; Shidhartha Das; David M. Bull; Izzat Darwazeh (ASP-DAC, 2012)

A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation. - Shidhartha Das; Ganesh S. Dasika; Karthik Shivashankar; David M. Bull (CICC, 2013)

A low-power 1GHz razor FIR accelerator with time-borrow tracking pipeline and approximate error correction in 65nm CMOS. - Paul N. Whatmough; Shidhartha Das; David M. Bull (ISSCC, 2013)

Circuit-Level Timing Error Tolerance for Low-Power DSP Filters and Transforms. - Paul N. Whatmough; Shidhartha Das; David M. Bull; Izzat Darwazeh (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A Low-Power 1-GHz Razor FIR Accelerator With Time-Borrow Tracking Pipeline and Approximate Error Correction in 65-nm CMOS. - Paul N. Whatmough; Shidhartha Das; David M. Bull (IEEE J. Solid State Circuits, 2014)

A 1 GHz Hardware Loop-Accelerator With Razor-Based Dynamic Adaptation for Energy-Efficient Operation. - Shidhartha Das; Ganesh S. Dasika; Karthik Shivashankar; David M. Bull (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Modeling and characterization of the system-level Power Delivery Network for a dual-core ARM Cortex-A57 cluster in 28nm CMOS. - Shidhartha Das; Paul N. Whatmough; David M. Bull (ISLPED, 2015)

Analysis of adaptive clocking technique for resonant supply voltage noise mitigation. - Paul N. Whatmough; Shidhartha Das; David M. Bull (ISLPED, 2015)

14.6 An all-digital power-delivery monitor for analysis of a 28nm dual-core ARM Cortex-A57 cluster. - Paul N. Whatmough; Shidhartha Das; Zacharias Hadjilambrou; David M. Bull (ISSCC, 2015)

A 0.6V all-digital body-coupled wakeup transceiver for IoT applications. - Paul N. Whatmough; George Smart; Shidhartha Das; Yiannis Andreopoulos; David M. Bull (VLSIC, 2015)

Power Integrity Analysis of a 28 nm Dual-Core ARM Cortex-A57 Cluster Using an All-Digital Power Delivery Monitor. - Paul N. Whatmough; Shidhartha Das; Zacharias Hadjilambrou; David M. Bull (IEEE J. Solid State Circuits, 2017)

GeST: An Automatic Framework For Generating CPU Stress-Tests. - Zacharias Hadjilambrou; Shidhartha Das; Paul N. Whatmough; David M. Bull; Yiannakis Sazeides (ISPASS, 2019)