Hardware prototyping of novel invasive multicore architectures. - Jürgen Becker 001; Stephanie Friederich; Jan Heisswolf; Ralf König 001; David May 003 (ASP-DAC, 2012)

An FPGA-based probability-aware fault simulator. - David May 003; Walter Stechele (ICSAMOS, 2012)

A resource-efficient probabilistic fault simulator. - David May 003; Walter Stechele (FPL, 2013)

Improving the significance of probabilistic circuit fault emulations. - David May 003; Walter Stechele (IOLTS, 2014)

Design of fine-grained sequential approximate circuits using probability-aware fault emulation. - David May 003; Walter Stechele (ISLPED, 2015)

Voltage over-scaling in sequential circuits for approximate computing. - David May 003; Walter Stechele (DTIS, 2016)