DIF: A framework for VLSI multi-level representation. - David P. LaPotin; Sani R. Nassif; Jayanth V. Rajan; Michael L. Bushnell; John A. Nestor (Integr., 1984)

Early matching of system requirements and package capabilities. - David P. LaPotin; Y.-H. Chen (ICCAD, 1989)

Early Package Analysis: Considerations and Case Study. - David P. LaPotin; Toufie R. Mazzawy; Marlin L. White (Computer, 1993)

Error Diagnosis for Transistor-Level Verification. - Andreas Kuehlmann; David Ihsin Cheng; Arvind Srinivasan 004; David P. LaPotin (DAC, 1994)

Verity - A formal verification program for custom CMOS circuits. - Andreas Kuehlmann; Arvind Srinivasan 004; David P. LaPotin (IBM J. Res. Dev., 1995)

Delay bounded buffered tree construction for timing driven floorplanning. - Maggie Zhiwei Kang; Wayne Wei-Ming Dai; Tom Dillinger; David P. LaPotin (ICCAD, 1997)

Physical design challenges for performance. - David P. LaPotin; Uttam Ghoshal; Eli Chiprout; Sani R. Nassif (ISPD, 1997)

Design methodology for a 1.0 GHz microprocessor. - Stephen D. Posluszny; Naoaki Aoki; David Boerstler; Jeffrey L. Burns; Sang H. Dhong; Uttam Ghoshal; H. Peter Hofstee; David P. LaPotin; Kyung T. Lee; David Meltzer; Hung C. Ngo; Kevin J. Nowka; et al. (ICCD, 1998)

Accurate area and delay estimation from RTL descriptions. - Arvind Srinivasan 004; Gary D. Huber; David P. LaPotin (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Workload and network-optimized computing systems. - David P. LaPotin; Shahrokh Daijavad; Charles L. Johnson; Steven W. Hunter; Kazuaki Ishizaki; Hubertus Franke; Heather D. Achilles; Dan P. Dumarot; Nancy A. Greco; Bijan Davari (IBM J. Res. Dev., 2010)