Methodology for correlations discovery in security logs. - Zdenek Martinasek; Petr Blazek; Pavel Silhavy; David Smekal (ICUMT, 2017)

Packet generators on field programmable gate array platform. - David Smekal; Jan Hajny; Zdenek Martinasek (TSP, 2017)

200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards. - Zdenek Martinasek; Jan Hajny; David Smekal; Lukas Malina; Denis Matousek; Michal Kekely; Nele Mentens (ASHES@CCS, 2018)

Hardware-Accelerated Twofish Core for FPGA. - David Smekal; Jan Hajny; Zdenek Martinasek (TSP, 2018)

Adjustable Multiphase Sinusoidal Oscillator with Fractional-Order Elements. - Jan Dvorak; David Kubánek; Jaroslav Koton; Jan Jerabek; David Smekal (ICUMT, 2019)

Privacy-enhancing Cloud Computing Solution for Big Data. - David Smekal; Sara Ricci; Petr Dzurenda; Zdenek Martinasek (ICUMT, 2019)

Modeling the Trade-off Between Security and Performance to Support the Product Life Cycle. - Radek Fujdiak; Petr Blazek; Ludovic Apvrille; Zdenek Martinasek; Petr Mlynek; Renaud Pacalet; David Smekal; Pavel Mrnustik; Maros Barabas; Maysam Zoor (MECO, 2019)

Towards Practical Deployment of Post-quantum Cryptography on Constrained Platforms and Hardware-Accelerated Platforms. - Lukas Malina; Sara Ricci; Petr Dzurenda; David Smekal; Jan Hajny; Tomas Gerlich (SECITC, 2019)

Hardware-Accelerated Cryptography for Software-Defined Networks with P4. - Lukas Malina; David Smekal; Sara Ricci; Jan Hajny; Peter Cíbik; Jakub Hrabovsky (SECITC, 2020)

Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs. - Sara Ricci; Lukas Malina; Petr Jedlicka; David Smékal; Jan Hajny; Peter Cíbik; Petr Dzurenda; Patrik Dobias (ARES, 2021)

Hardware-based Cryptographic Accelerator for Post Quantum Era. - Lukas Malina; Peter Cíbik; Petr Jedlicka; David Smekal; Sara Ricci; Jakub Hrabovsky (ICUMT, 2021)

Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs. - Sara Ricci; Lukas Malina; Petr Jedlicka; David Smekal; Jan Hajny; Peter Cíbik; Patrik Dobias (IACR Cryptol. ePrint Arch., 2021)

Pushing AES-256-GCM to Limits: Design, Implementation and Real FPGA Tests. - Peter Cíbik; Patrik Dobias; Sara Ricci; Jan Hajny; Lukas Malina; Petr Jedlicka; David Smekal (ACNS Workshops (1), 2024)