Design and Power Optimization of High-Speed Pipelined ADC with Programmable Gain Amplifier for Wireless Receiver Applications. - David Sundararaj Shylu; D. Jackuline Moni; G. Nivetha 002 (Wirel. Pers. Commun., 2016)

Power efficient low latency architecture for decoder: Breaking the ACS bottleneck. - Subramanyam Radha; David Sundararaj Shylu; Perattur Nagabushanam (Int. J. Circuit Theory Appl., 2019)

Low noise amplifier with resistive and capacitive feedback for 2.4 GHz RF receiver front end. - Subramanyam Radha; David Sundararaj Shylu; Perattur Nagabushanam; Jisha Mathew (J. High Speed Networks, 2019)