David Wolpert

Orcid: 0000-0001-5114-8361

Affiliations:
  • IBM Systems, Poughkeepsie, NY, USA
  • University of Rochester, Electrical and Computer Engineering Department, NY, USA


According to our database1, David Wolpert authored at least 22 papers between 2007 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2022
POWER10™: A 16-Core SMT8 Server Processor With 2TB/s Off-Chip Bandwidth in 7nm Technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022


2021
Cores, Cache, Content, and Characterization: IBM's Second Generation 14-nm Product, z15.
IEEE J. Solid State Circuits, 2021

2020
IBM z15: Physical design improvements to significantly increase content in the same technology.
IBM J. Res. Dev., 2020


2019
IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems.
IEEE J. Solid State Circuits, 2019

2018
IBM z14: Enabling physical design in 14-nm technology for high-performance, high-reliability microprocessors.
IBM J. Res. Dev., 2018

IBM z14 design methodology enhancements in the 14-nm technology node.
IBM J. Res. Dev., 2018


2012
Exploiting Programmable Temperature Compensation Devices to Manage Temperature-Induced Delay Uncertainty.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011
A Sensor System to Detect Positive and Negative Current-Temperature Dependences.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

Adaptive Voltage Control for Energy-Efficient NoC Links.
Proceedings of the Low Power Networks-on-Chip., 2011

2010
Self-Adaptive System for Addressing Permanent Errors in On-Chip Interconnects.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Temperature-Aware Delay Borrowing for Energy-Efficient Low-Voltage Link Design.
Proceedings of the NOCS 2010, 2010

2009
A simulator for ballistic nanostructures in a 2-D electron gas.
ACM J. Emerg. Technol. Comput. Syst., 2009

Lookahead-based adaptive voltage scheme for energy-efficient on-chip interconnect links.
Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Ballistic Deflection Transistors and the Emerging Nanoscale Era.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Sensor to Detect Normal or Reverse Temperature Dependence in Nanoscale CMOS Circuits.
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

2008
Adaptive Delay Correction for Runtime Variation in Dynamic voltage Scaling Systems.
J. Circuits Syst. Comput., 2008

Normal and Reverse Temperature Dependence in Variation-Tolerant Nanoscale Systems with High-k Dielectrics and Metal Gates.
Proceedings of the Nano-Net - Third International ICST Conference, 2008

A Low-Power Safety Mode for Variation Tolerant Systems-on-Chip.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

2007
Temperature-Robust Performance Yield through Supply Voltage Selection.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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