A 130nm CMOS tunable digital frequency divider for dual-band microwave radiometer. - Davide Dermit; Fabio Ducati; Damenico Balsamo; Paolo Lucchi; Mattia Borgarino; Gilles Jacquemod (ICECS, 2009)

A 2×14bit digital transmitter with memoryless current unit cells and integrated AM/PM calibration. - Mark Ingels; Davide Dermit; Yao Liu; Hans Cappelle; Jan Craninckx (ESSCIRC, 2017)

A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion. - Benjamin P. Hershberg; Davide Dermit; Barend van Liempd; Ewout Martens; Nereo Markulic; Jorge Lagos 001; Jan Craninckx (ISSCC, 2019)

A 6-to-600MS/s Fully Dynamic Ringamp Pipelined ADC with Asynchronous Event-Driven Clocking in 16nm. - Benjamin P. Hershberg; Barend van Liempd; Nereo Markulic; Jorge Lagos 001; Ewout Martens; Davide Dermit; Jan Craninckx (ISSCC, 2019)

A 1MS/s to 1GS/s Ringamp-Based Pipelined ADC with Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16nm. - Benjamin P. Hershberg; Nereo Markulic; Jorge Lagos 001; Ewout Martens; Davide Dermit; Jan Craninckx (VLSI Circuits, 2020)

A 10.0 ENOB, 6.2 fJ/conv.-step, 500 MS/s Ringamp-Based Pipelined-SAR ADC with Background Calibration and Dynamic Reference Regulation in 16nm CMOS. - Jorge Lagos 001; Nereo Markulic; Benjamin P. Hershberg; Davide Dermit; Mithlesh Shrivas; Ewout Martens; Jan Craninckx (VLSI Circuits, 2021)

A Compact 8-bit, 8 GS/s 8×TI SAR ADC in 16nm with 45dB SNDR and 5 GHz ERBW. - Ewout Martens; Davide Dermit; Mithlesh Shrivas; Shun Nagata; Jan Craninckx (VLSI Circuits, 2021)

A 4-GS/s 10-ENOB 75-mW Ringamp ADC in 16-nm CMOS With Background Monitoring of Distortion. - Benjamin P. Hershberg; Davide Dermit; Barend van Liempd; Ewout Martens; Nereo Markulic; Jorge Lagos 001; Jan Craninckx (IEEE J. Solid State Circuits, 2021)

A 1-MS/s to 1-GS/s Ringamp-Based Pipelined ADC With Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16 nm. - Benjamin P. Hershberg; Nereo Markulic; Jorge Lagos 001; Ewout Martens; Davide Dermit; Jan Craninckx (IEEE J. Solid State Circuits, 2021)

Asynchronous Event-Driven Clocking and Control in Pipelined ADCs. - Benjamin P. Hershberg; Barend van Liempd; Nereo Markulic; Jorge Lagos 001; Ewout Martens; Davide Dermit; Jan Craninckx (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A Redundancy-Based Background Calibration for Comparator Offset/Threshold and DAC Gain in a Ping-Pong SAR ADC. - Keigo Bunsen; Ewout Martens; Davide Dermit; Jan Craninckx (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 10.1-ENOB, 6.2-fJ/conv.-step, 500-MS/s, Ringamp-Based Pipelined-SAR ADC With Background Calibration and Dynamic Reference Regulation in 16-nm CMOS. - Jorge Lagos 001; Nereo Markulic; Benjamin P. Hershberg; Davide Dermit; Mithlesh Shrivas; Ewout Martens; Jan Craninckx (IEEE J. Solid State Circuits, 2022)