Improved Reversed Nested Miller Frequency Compensation Technique With Voltage Buffer and Resistor. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

An efficient RNM compensation topology with voltage buffer and nulling resistors for large-capacitive-load three-stage OTAs. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2009)

A high-speed low-power output buffer amplifier for large-size LCD applications. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2009)

Step-response Optimization Techniques for Low-power Three-stage Operational Amplifiers for Large Capacitive Load Applications. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2009)

A New Advanced RNMC Technique with Dual-active Current and Voltage Buffers for Low-power High-load Three-stage Amplifiers. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2009)

Improved Power-Efficient RNMC Technique with voltage Buffer and Nulling resistors for Low-Power High-Load Three-Stage amplifiers. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (J. Circuits Syst. Comput., 2009)

Analytical figure of merit evaluation of RNMC networks for low-power three-stage OTAs. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2010)

A novel low-power high-speed rail-to-rail class-B buffer amplifier for LCD output drivers. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2010)

Low-power dual-active class-AB buffer amplifier with self-biasing network for LCD column drivers. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2010)

Step-response optimisation techniques for low-power, high-load, three-stage operational amplifiers driving large capacitive loads. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (IET Circuits Devices Syst., 2010)

Analytical comparison of reversed nested Miller frequency compensation techniques. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 2010)

Improved Low-Power High-Speed Buffer amplifier with slew-Rate Enhancement for LCD Applications. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (J. Circuits Syst. Comput., 2010)

Self-biased dual-path push-pull output buffer amplifier topology for LCD driver applications. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2011)

A new accurate analytical expression for the SiPM transient response to single photons. - Davide Marano; Giovanni Bonanno; Massimiliano Belluso; Sergio Billotta; Alessandro Grillo; S. Garozzo; Giuseppe Romeo; Alfio Dario Grasso; Salvatore Pennisi; Gaetano Palumbo (ICECS, 2014)

Self-Biased Dual-Path Push-Pull Output Buffer Amplifier for LCD Column Drivers. - Alfio Dario Grasso; Davide Marano; Fermin Esparza-Alfaro; Antonio J. López-Martín; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

195-nW 120-dB subthreshold CMOS OTA driving up to 200 pF and occupying only 4.4-10-3 mm2. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2015)

A new enhanced PSPICE implementation of the equivalent circuit model of SiPM detectors. - Davide Marano; Giovanni Bonanno; S. Garozzo; Giuseppe Romeo; Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (NEWCAS, 2015)

Design Methodology of Subthreshold Three-Stage CMOS OTAs Suitable for Ultra-Low-Power Low-Area and High Driving Capability. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Enhanced analytical model and output dynamic response of SiPM-Based electronic read-outs. - Davide Marano; Alfio Dario Grasso (ICECS, 2016)

A 0.003-mm2 50-mW three-stage amplifier driving 10-nF with 2.7-MHz GBW. - Davide Marano; Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2016)

Symbolic factorization methodology for multistage amplifier transfer functions. - Alfio Dario Grasso; Davide Marano; Salvatore Pennisi; Giorgio Antonino Vazzana (Int. J. Circuit Theory Appl., 2016)

Optimized Active Single-Miller Capacitor Compensation With Inner Half-Feedforward Stage for Very High-Load Three-Stage OTAs. - Davide Marano; Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Novel straightforward and effective extraction methodology for SiPM model parameters. - Davide Marano; Alfio Dario Grasso (ECCTD, 2017)

Three-stage single-miller CMOS OTA driving 10 nF with 1.46-MHz GBW. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi; Davide Marano (ICICDT, 2018)

High-Performance Three-Stage Single-Miller CMOS OTA With No Upper Limit of CL. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Single miller capacitor frequency compensation techniques: Theoretical comparison and critical review. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 2022)