A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers. - Massimo Brandolini; Paolo Rossi; Davide Sanzogni; Francesco Svelto (IEEE J. Solid State Circuits, 2006)

A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier. - Antonio Liscidini; Massimo Brandolini; Davide Sanzogni; Rinaldo Castello (IEEE J. Solid State Circuits, 2006)

A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR. - Simone Erba; Massimo Pozzoni; Matteo Pisati; Riccardo Brama; Davide Sanzogni; Emanuele Depaoli; Paolo Viola; Francesco Svelto (CICC, 2008)

A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication. - Massimo Pozzoni; Simone Erba; Paolo Viola; Matteo Pisati; Emanuele Depaoli; Davide Sanzogni; Riccardo Brama; Daniele Baldi; Matteo Repossi; Francesco Svelto (IEEE J. Solid State Circuits, 2009)

A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization. - Massimo Pozzoni; Simone Erba; Davide Sanzogni; Marcello Ganzerli; Paolo Viola; Daniele Baldi; Matteo Repossi; Giorgio Spelgatti; Francesco Svelto (ISSCC, 2010)

An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operation. - Marcello Ganzerli; Luca Larcher; Simone Erba; Davide Sanzogni (ISCAS, 2011)

A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS. - Francesco Radice; Melchiorre Bruccoleri; Marcello Ganzerli; Giorgio Spelgatti; Davide Sanzogni; Massimo Pozzoni; Andrea Mazzanti (ESSCIRC, 2013)