nGFSIM : A GPU-based fault simulator for 1-to-n detection and its applications. - Huawei Li 001; Dawen Xu 002; Yinhe Han 001; Kwang-Ting Cheng; Xiaowei Li 001 (ITC, 2010)

Test-Quality Optimization for Variable $n$ -Detections of Transition Faults. - Dawen Xu 002; Huawei Li 001; Amirali Ghofrani; Kwang-Ting Cheng; Yinhe Han 001; Xiaowei Li 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)

MTTF-Aware Reliability Task Scheduling for Heterogeneous Multicore System. - Huaguo Liang; Yangyang Dai; Maoxiang Yi; Dawen Xu 002; Zhengfeng Huang (ICA3PP (2), 2015)

NBTI-induced circuit aging optimization by protectability-aware gate replacement technique. - Guimao Zhang; Maoxiang Yi; Yong Miao; Dawen Xu 002; Huaguo Liang (LATS, 2015)

Selective off-loading to Memory: Task Partitioning and Mapping for PIM-enabled Heterogeneous Systems. - Dawen Xu 002; Yi Liao; Ying Wang 001; Huawei Li 001; Xiaowei Li 001 (Conf. Computing Frontiers, 2017)

FCN-engine: accelerating deconvolutional layers in classic CNN processors. - Dawen Xu 002; Kaijie Tu; Ying Wang 001; Cheng Liu 008; Bingsheng He; Huawei Li 001 (ICCAD, 2018)

MTTF-Aware Reliability Task Scheduling for PIM-Based Heterogeneous Computing System. - Desong Pang; Dawen Xu 002; Ying Wang 001; Huaguo Liang (ITC-Asia, 2018)

Resilient Neural Network Training for Accelerators with Computing Errors. - Dawen Xu 002; KouZi Xing; Cheng Liu 008; Ying Wang 001; Yulin Dai; Long Cheng 003; Huawei Li 001; Lei Zhang 008 (ASAP, 2019)

Exploring emerging CNFET for efficient last level cache design. - Dawen Xu 002; Li Li; Ying Wang 001; Cheng Liu 008; Huawei Li 001 (ASP-DAC, 2019)

Squeezing the Last MHz for CNN Acceleration on FPGAs. - Li Li; Dawen Xu 002; Kouzi Xing; Cheng Liu 008; Ying Wang 001; Huawei Li 001; Xiaowei Li 001 (ITC-Asia, 2019)

Persistent Fault Analysis of Neural Networks on FPGA-based Acceleration System. - Dawen Xu 002; Ziyang Zhu; Cheng Liu 008; Ying Wang 001; Huawei Li 001; Lei Zhang 008; Kwang-Ting Cheng (ASAP, 2020)

RaQu: An automatic high-utilization CNN quantization and mapping framework for general-purpose RRAM Accelerator. - Songyun Qu; Bing Li 017; Ying Wang 001; Dawen Xu 002; Xiandong Zhao; Lei Zhang 008 (DAC, 2020)

CNT-Cache: an Energy-Efficient Carbon Nanotube Cache with Adaptive Encoding. - Dawen Xu 002; Kexin Chu; Cheng Liu 008; Ying Wang 001; Lei Zhang 008; Huawei Li 001 (DATE, 2020)

Multi-task Scheduling for PIM-based Heterogeneous Computing System. - Dawen Xu 002; Cheng Chu; Cheng Liu 008; Ying Wang 001; Xianzhong Zhou; Lei Zhang 008; Huaguo Liang; Huawei Li 001 (ACM Great Lakes Symposium on VLSI, 2020)

A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators. - Dawen Xu 002; Cheng Chu; Qianlong Wang; Cheng Liu 008; Ying Wang 001; Lei Zhang 008; Huaguo Liang; Kwang-Ting Cheng (ICCD, 2020)

Accelerating Generative Neural Networks on Unmodified Deep Learning Processors - A Software Approach. - Dawen Xu 002; Cheng Liu 008; Ying Wang 001; Kaijie Tu; Bingsheng He; Lei Zhang 008 (IEEE Trans. Computers, 2020)

RECOIN: A Low-Power Processing-in-ReRAM Architecture for Deformable Convolution. - Cheng Chu; Fan Chen 001; Dawen Xu 002; Ying Wang 001 (ACM Great Lakes Symposium on VLSI, 2021)

Energy-Efficient Accelerator Design for Deformable Convolution Networks. - Dawen Xu 002; Cheng Chu; Cheng Liu 008; Ying Wang 001; Huawei Li 001; Xiaowei Li 001; Kwang-Ting Cheng (CoRR, 2021)

Taming Process Variations in CNFET for Efficient Last Level Cache Design. - Dawen Xu 002; Zhuangyu Feng; Cheng Liu 008; Li Li; Ying Wang 001; Yuanqing Cheng; Huawei Li 001; Xiaowei Li 001 (CoRR, 2021)

Approximate multipliers based on a novel unbiased approximate 4-2 compressor. - Bao Fang; Huaguo Liang; Dawen Xu 002; Maoxiang Yi; Yongxia Sheng; Cuiyun Jiang; Zhengfeng Huang; Yingchun Lu (Integr., 2021)

EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks. - Shengwen Liang; Ying Wang 001; Cheng Liu 008; Lei He 016; Huawei Li 001; Dawen Xu 002; Xiaowei Li 001 (IEEE Trans. Computers, 2021)

R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors. - Dawen Xu 002; Meng He 012; Cheng Liu 008; Ying Wang 001; Long Cheng 003; Huawei Li 001; Xiaowei Li 001; Kwang-Ting Cheng (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System. - Dawen Xu 002; Ziyang Zhu; Cheng Liu 008; Ying Wang 001; Shuang Zhao; Lei Zhang 008; Huaguo Liang; Huawei Li 001; Kwang-Ting Cheng (IEEE Trans. Very Large Scale Integr. Syst., 2021)

MOCCA: A Process Variation Tolerant Systolic DNN Accelerator using CNFETs in Monolithic 3D. - Samuel J. Engers; Cheng Chu; Dawen Xu 002; Ying Wang 001; Fan Chen 001 (ACM Great Lakes Symposium on VLSI, 2022)

Canopy: A CNFET-based Process Variation Aware Systolic DNN Accelerator. - Cheng Chu; Dawen Xu 002; Ying Wang 001; Fan Chen 001 (ISLPED, 2022)

HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning. - Cheng Liu 008; Cheng Chu; Dawen Xu 002; Ying Wang 001; Qianlong Wang; Huawei Li 001; Xiaowei Li 001; Kwang-Ting Cheng (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Taming Process Variations in CNFET for Efficient Last-Level Cache Design. - Dawen Xu 002; Zhuangyu Feng; Cheng Liu 008; Li Li; Ying Wang 001; Huawei Li 001; Xiaowei Li 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses. - Cheng Chu; Cheng Liu 008; Dawen Xu 002; Ying Wang 001; Tao Luo 014; Huawei Li 001; Xiaowei Li 001 (ACM Trans. Design Autom. Electr. Syst., 2023)

HyQA: Hybrid Near-Data Processing Platform for Embedding Based Question Answering System. - Shengwen Liang; Ziming Yuan; Ying Wang 001; Dawen Xu 002; Huawei Li 001; Xiaowei Li 001 (DATE, 2024)