Effect of Drain Induced Barrier Enhancement on Subthreshold Swing and OFF-State Current of Short Channel MOSFETs: A TCAD Study. - Mamidala Karthik Ram; Neha Tiwari; Dawit Burusie Abdi; Sneh Saurabh (IEEE Access, 2021)

Drain Induced Barrier Widening and Reverse Short Channel Effects in Tunneling FETs: Investigation and Analysis. - Mamidala Karthik Ram; Neha Tiwari; Dawit Burusie Abdi; Sneh Saurabh (IEEE Access, 2021)

Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs). - Subrat Mishra; Sankatali Venkateswarlu; Bjorn Vermeersch; Moritz Brunion; Melina Lofrano; Dawit Burusie Abdi; Herman Oprins; Dwaipayan Biswas; Odysseas Zografos; Gaspard Hiblot; Geert Van der Plas; Pieter Weckx; et al. (IRPS, 2023)

3D SRAM Macro Design in 3D Nanofabric Process Technology. - Dawit Burusie Abdi; Shairfe Muhammad Salahuddin; Jürgen Bömmels; Edouard Giacomin; Pieter Weckx; Julien Ryckaert; Geert Hellings; Francky Catthoor (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Scaling NVMs in Event-Driven Architectures for Edge Inference. - Junren Chen; Kanishkan Vadivel; Dawit Burusie Abdi; Priya Venugopal; Refik Bilgic; Giacomo Indiveri; Fernando García-Redondo; Dwaipayan Biswas (APCCAS, 2024)

Thermal Performance Evaluation of Multi-Core SOCs Using Power-Thermal Co-Simulation. - Subrat Mishra; Bjorn Vermeersch; Sankatali Venkateswarlu; Halil Kukner; A. Sharma; G. Mirabeli; Fabian M. Bufler; Moritz Brunion; Dawit Burusie Abdi; Herman Oprins; Dwaipayan Biswas; Odysseas Zografos; et al. (IRPS, 2024)

On-chip Memory in Accelerator-based Systems: A System Technology Co-Optimization (STCO) Perspective for Emerging Device Technologies. - Siva Satyendra Sahoo; Dawit Burusie Abdi; Julien Ryckaert; James Myers; Dwaipayan Biswas (SOCC, 2024)

Thermal Considerations for Block-Level PPA Assessment in Angstrom Era: A Comparison Study of Nanosheet FETs (A10) & Complementary FETs (A5). - S. Mishra; Bjorn Vermeersch; Sankatali Venkateswarlu; Halil Kukner; Gioele Mirabelli; Fabian M. Bufler; Moritz Brunion; Dawit Burusie Abdi; Herman Oprins; Dwaipayan Biswas; Odysseas Zografos; Francky Catthoor; et al. (VLSI Technology and Circuits, 2024)

Ultra-Scaled E-Tree-Based SRAM Design and Optimization With Interconnect Focus. - Zhenlin Pei; Hsiao-Hsuan Liu; Mahta Mayahinia; Mehdi B. Tahoori; Francky Catthoor; Zsolt Tokei; Dawit Burusie Abdi; James Myers; Chenyun Pan (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Design Technology Co-Optimization of 3D SRAM Macro in Nanosheet Technology for High-Bandwidth Applications. - Anurag Swarnkar; Dawit Burusie Abdi; Bhawana Kumari; Priya Venugopal; Nicolas Pantano; Geert Hellings; Jaydeep Kulkarni; Dwaipayan Biswas; Julien Ryckaert; Fernando García-Redondo (IMW, 2025)

3D SRAM Disaggregation in Advanced CMOS Nodes using Hybrid Bonding Technology. - Bhawana Kumari; Anurag Swarnkar; Dawit Burusie Abdi; Fernando García-Redondo; James Myers; Julien Ryckaert; Jaydeep Kulkarni; Dwaipayan Biswas (ISCAS, 2025)