Event-driven gate-level simulation with GP-GPUs. - Debapriya Chatterjee; Andrew DeOrio; Valeria Bertacco (DAC, 2009)

GCS: High-performance gate-level simulation with GPGPUs. - Debapriya Chatterjee; Andrew DeOrio; Valeria Bertacco (DATE, 2009)

Activity-based refinement for abstraction-guided simulation. - Debapriya Chatterjee; Valeria Bertacco (HLDVT, 2009)

EQUIPE: Parallel equivalence checking with GP-GPUs. - Debapriya Chatterjee; Valeria Bertacco (ICCD, 2010)

Simulation-based signal selection for state restoration in silicon debug. - Debapriya Chatterjee; Calvin McCarter; Valeria Bertacco (ICCAD, 2011)

Gate-Level Simulation with GPU Computing. - Debapriya Chatterjee; Andrew DeOrio; Valeria Bertacco (ACM Trans. Design Autom. Electr. Syst., 2011)

SystemC simulation on GP-GPUs: CUDA vs. OpenCL. - Nicola Bombieri; Sara Vinco; Valeria Bertacco; Debapriya Chatterjee (CODES+ISSS, 2012)

Checking architectural outputs instruction-by-instruction on acceleration platforms. - Debapriya Chatterjee; Anatoly Koyfman; Ronny Morad; Avi Ziv; Valeria Bertacco (DAC, 2012)

SAGA: SystemC acceleration on GPU architectures. - Sara Vinco; Debapriya Chatterjee; Valeria Bertacco; Franco Fummi (DAC, 2012)

Approximating checkers for simulation acceleration. - Biruk Mammo; Debapriya Chatterjee; Dmitry Pidan; Amir Nahir; Avi Ziv; Ronny Morad; Valeria Bertacco (DATE, 2012)

On the use of GP-GPUs for accelerating compute-intensive EDA applications. - Valeria Bertacco; Debapriya Chatterjee; Nicola Bombieri; Franco Fummi; Sara Vinco; Anirudh M. Kaushik; Hiren D. Patel (DATE, 2013)

Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms. - Debapriya Chatterjee; Biruk Mammo; Doowon Lee; Raviv Gal; Ronny Morad; Amir Nahir; Avi Ziv; Valeria Bertacco (ICCAD, 2013)

Harnessing Simulation Acceleration to Solve the Digital Design Verification Challenge. - Debapriya Chatterjee (2013)

ArChiVED: Architectural checking via event digests for high performance validation. - Chang-Hong Hsu; Debapriya Chatterjee; Ronny Morad; Raviv Gal; Valeria Bertacco (DATE, 2014)

Addressing verification challenges of heterogeneous systems based on IBM POWER9. - Klaus-Dieter Schubert; Syed Saif Abrar; Duane Averill; Ellen Bauman; Aaron C. Brown; Ron Cash; Debapriya Chatterjee; John Gullickson; Mark Nelson; Kevin A. Pasnik; Krishnan Sugavanam (IBM J. Res. Dev., 2018)

Return-oriented programming protection in the IBM POWER10. - José E. Moreira; Debapriya Chatterjee; Kattamuri Ekanadham; Arnold Flores (CF, 2022)

Verifying Memory Confidentiality and Integrity of Intel TDX Trusted Execution Environments. - Hasini Witharana; Debapriya Chatterjee; Prabhat Mishra 001 (HOST, 2024)