High voltage tolerant output buffer design for mixed voltage interfaces. - Debashis Mandal; Pradip Mandal (ISCAS (5), 2005)

Development of a Wireless Integrated Toxic and Explosive MEMS Based Gas Sensor. - T. K. Bhattacharyya; Shreyas Sen; Debashis Mandal; S. K. Lahiri 001 (VLSI Design, 2006)

7.95mW 2.4GHz Fully-Integrated CMOS Integer N Frequency Synthesizer. - Debashis Mandal; T. K. Bhattacharyya (VLSI Design, 2007)

Implementation of CMOS Low-power Integer-N Frequency Synthesizer for SOC Design. - Debashis Mandal; T. K. Bhattacharyya (J. Comput., 2008)

Spur suppression in frequency synthesizer using switched capacitor array. - Debashis Mandal; Pradip Mandal; Tarun Kanti Bhattacharyya (ISOCC, 2012)

Spur reducing architecture of frequency synthesiser using switched capacitors. - Debashis Mandal; Pradip Mandal; T. K. Bhattacharyya (IET Circuits Devices Syst., 2014)

Fully-integrated switched-capacitor voltage regulator with on-chip current-sensing and workload optimization in 32nm SOI CMOS. - Xiaoyang Mi; Debashis Mandal; Visvesh S. Sathe 001; Bertan Bakkaloglu; Jae-sun Seo (ISLPED, 2015)

Disturbance-free BIST for loop characterization of DC-DC buck converters. - Navankur Beohar; Priyanka Bakliwal; Sidhanto Roy; Debashis Mandal; Philippe Adell; Bert Vermeire; Bertan Bakkaloglu; Sule Ozev (VTS, 2015)

Prediction of reference spur in frequency synthesisers. - Debashis Mandal; Pradip Mandal; T. K. Bhattacharyya (IET Circuits Devices Syst., 2015)

Spur reduction in frequency synthesizer with an array of switched capacitors. - Debashis Mandal; Pradip Mandal; Tarun Kanti Bhattacharyya (Int. J. Circuit Theory Appl., 2015)

A 6 A, 93% Peak Efficiency, 4-Phase Digitally Synchronized Hysteretic Buck Converter With ±1.5% Frequency and ±3.6% Current-Sharing Error. - Ming Sun 005; Zhe Yang; Kishan Joshi; Debashis Mandal; Philippe Adell; Bertan Bakkaloglu (IEEE J. Solid State Circuits, 2017)

A 100-mA, 99.11% Current Efficiency, 2-mVpp Ripple Digitally Controlled LDO With Active Ripple Suppression. - Michael Cheah; Debashis Mandal; Bertan Bakkaloglu; Sayfe Kiaei (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A 50-mA 99.2% Peak Current Efficiency, 250-ns Settling Time Digital Low-Dropout Regulator With Transient Enhanced PI Controller. - ChaiYong Lim; Debashis Mandal; Bertan Bakkaloglu; Sayfe Kiaei (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Sense resistor-free analog power sensor for boost converter with 14.1% gain error and 9.4% offset error. - Shrikant Singh; Debashis Mandal; Bertan Bakkaloglu; Sayfe Kiaei (LASCAS, 2018)

Online Built-In Self-Test of High Switching Frequency DC-DC Converters Using Model Reference Based System Identification Techniques. - Navankur Beohar; Venkata N. K. Malladi; Debashis Mandal; Sule Ozev; Bertan Bakkaloglu (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Disturbance-Free Built-In Self-Test and Diagnosis Technique for DC-DC Converters. - Maryam Shafiee; Navankur Beohar; Priyanka Bakliwal; Sidhanto Roy; Debashis Mandal; Bertan Bakkaloglu; Sule Ozev (ACM Trans. Design Autom. Electr. Syst., 2018)

A 91%-Efficiency Envelope-Tracking Modulator Using Hysteresis-Controlled Three-Level Switching Regulator and Slew-Rate-Enhanced Linear Amplifier for LTE-80MHz Applications. - Parisa Mahmoudidaryan; Debashis Mandal; Bertan Bakkaloglu; Sayfe Kiaei (ISSCC, 2019)

Wideband Hybrid Envelope Tracking Modulator With Hysteretic-Controlled Three-Level Switching Converter and Slew-Rate Enhanced Linear Amplifier. - Parisa Mahmoudidaryan; Debashis Mandal; Bertan Bakkaloglu; Sayfe Kiaei (IEEE J. Solid State Circuits, 2019)

A 50-V Isolation, 100-MHz, 50-mW Single-Chip Junction Isolated DC-DC Converter With Self-Tuned Maximum Power Transfer Frequency. - Chengxi Liu; Debashis Mandal; Zhao Yao; Ming Sun 005; Jim Todsen; Brian Johnson; Sayfe Kiaei; Bertan Bakkaloglu (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Adaptively Biased Output Cap-Less NMOS LDO With 19 ns Settling Time. - Debashis Mandal; Chirag Desai; Bertan Bakkaloglu; Sayfe Kiaei (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Low-Power/Low-Voltage Integrated CMOS Sense Resistor-Free Analog Power/Current Sensor Compatible With High-Voltage Switching DC-DC Converter. - Shrikant Singh; Debashis Mandal; Bertan Bakkaloglu; Sayfe Kiaei (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Towards an Ontology for Enterprise Level Information Security Policy Analysis. - Debashis Mandal; Chandan Mazumdar (ICISSP, 2021)

A Rail-to-Rail Input Class-AB Linear Amplifier with Improved Bandwidth and Slew-Rate for Envelope Tracking Supply Modulators. - Kondapalli Surya Prasad; Pudi Hemanth; Debashis Mandal (ISCAS, 2024)

Three-Level Output Side Gate Driver for 1 V Thin-Gate-Oxide NMOSFET Switch in a SIDO Converter. - Abhijit Keshri; Pramit Banerjee; Gautam Dey Kanungo; Kallol Chatterjee; Paras Garg; Santanu Kapat; Debashis Mandal (ISCAS, 2025)