MSimDRAM: Formal Model Driven Development of a DRAM Simulator. - Debiprasanna Sahoo; Manoranjan Satpathy (VLSID, 2016)

An Experimental Study on Dynamic Bank Partitioning of DRAM in Chip Multiprocessors. - Debiprasanna Sahoo; Manoranjan Satpathy; Madhu Mutyam (VLSID, 2017)

CAMO: A novel cache management organization for GPGPUs. - Debiprasanna Sahoo; Swaraj Sha; Manoranjan Satpathy; Madhu Mutyam; Laxmi Narayan Bhuyan (ASP-DAC, 2018)

DRAM cache access optimization leveraging line locking in tag cache: work-in-progress. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy (CASES, 2018)

ReDRAM: A Reconfigurable DRAM Cache for GPGPUs. - Debiprasanna Sahoo; Swaraj Sha; Manoranjan Satpathy; Madhu Mutyam (IEEE Comput. Archit. Lett., 2018)

Formal Modeling and Verification of Controllers for a Family of DRAM Caches. - Debiprasanna Sahoo; Swaraj Sha; Manoranjan Satpathy; Madhu Mutyam; S. Ramesh 002; Partha S. Roop (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Post-Model Validation of Victim DRAM Caches. - Debiprasanna Sahoo; Shivani Tripathy; Manoranjan Satpathy; Madhu Mutyam (ICCD, 2019)

Formal Modeling and Verification of NAND Flash Memory Supporting Advanced Operations. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy; Srinivas Pinisetty (ICCD, 2019)

Multidimensional Grid Aware Address Prediction for GPGPU. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy (VLSID, 2019)

Formal Modeling and Verification of a Victim DRAM Cache. - Debiprasanna Sahoo; Swaraj Sha; Manoranjan Satpathy; Madhu Mutyam; S. Ramesh 002; Partha S. Roop (ACM Trans. Design Autom. Electr. Syst., 2019)

Fuzzy fairness controller for NVMe SSDs. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy; Madhu Mutyam (ICS, 2020)

Slumber: static-power management for GPGPU register files. - Devashree Tripathy; Hadi Zamani 001; Debiprasanna Sahoo; Laxmi N. Bhuyan; Manoranjan Satpathy (ISLPED, 2020)

Formal Modeling and Verification of Security Properties of a Ransomware-Resistant SSD. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy; Madhu Mutyam (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)