Modeling of Leakages in Nano-Scale DG MOSFET to Implement Low Power SRAM: A Device/Circuit Co-Design. - Deblina Sarkar; Samiran Ganguly; Deepanjan Datta; A. Ananda Prasad Sarab; Sudeb Dasgupta (VLSI Design, 2007)

Modeling of Leakage Current Mechanisms in Nanoscale DG MOSFET and its Application to Low Power SRAM Design. - Deblina Sarkar; Deepanjan Datta; Sudeb Dasgupta (J. Comput., 2008)

2D electronics: Graphene and beyond. - Wei Cao; Jiahao Kang; Wei Liu 067; Yasin Khatami; Deblina Sarkar; Kaustav Banerjee (ESSDERC, 2013)

Energy-Efficient Sampling Using Stochastic Magnetic Tunnel Junctions. - Nicolas Alder; Shivam Nitin Kajale; Milin Tunsiricharoengul; Deblina Sarkar; Ralf Herbrich (CoRR, 2025)