A High CMRR, High Slew Rate, Low Total Harmonic Distortion CMOS OTA for HF Applications. - Anup Mane; Deepa Yagain (ICETET, 2009)

Design of High Speed Adders Using CMOS and Transmission Gates in Submicron Technology: A Comparative Study. - Akansha Baliga; Deepa Yagain (ICETET, 2011)

Design and Implementation of a Linear Transconductance Amplifier with a Digitally Controlled Current Source. - R. L. Nagaraj; Deepa Yagain (ICETET, 2011)

Design and Implementation of High Speed, Low Area Multiported Loadless 4T Memory Cell. - Deepa Yagain; Ankit Parakh; Akriti Kedia; Gunjan Kumar Gupta (ICETET, 2011)

Design of Synthesizable, Retimed Digital Filters Using FPGA Based Path Solvers with MCM Approach: Comparison and CAD Tool. - Deepa Yagain; A. Vijaya Krishna (VLSI Design, 2014)

Efficient Audio Filter Using Folded Pipelining Architecture Based on Retiming Using Evolutionary Computation. - Deepa Yagain; Sivanag Balla; A. Vijaya Krishna (J. Circuits Syst. Comput., 2015)

A novel framework for retiming using evolutionary computation for high level synthesis of digital filters. - Deepa Yagain; A. Vijaya Krishna (Swarm Evol. Comput., 2015)

Framework for Digital Filter Design Optimization (DiFiDOT) using MCM Based Register Minimization Retiming for Noise Removal ECG Filters. - Deepa Yagain; A. Vijaya Krishna (J. Signal Process. Syst., 2016)

Design of retimed digital filters using MCM methodology for noise removal in EEG. - Deepa Yagain; T. N. Chandrashekar Rao; A. Vijaya Krishna (Int. J. Comput. Aided Eng. Technol., 2017)