Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs. - Matthias Jung 001; Éder Zulian; Deepak M. Mathew; Matthias Herrmann; Christian Brugger; Christian Weis; Norbert Wehn (MEMSYS, 2015)

Efficient reliability management in SoCs - an approximate DRAM perspective. - Matthias Jung 001; Deepak M. Mathew; Christian Weis; Norbert Wehn (ASP-DAC, 2016)

Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAM. - Matthias Jung 001; Deepak M. Mathew; Christian Weis; Norbert Wehn (DAC, 2016)

ConGen: An Application Specific DRAM Memory Controller Generator. - Matthias Jung 001; Deepak M. Mathew; Christian Weis; Norbert Wehn; Irene Heinrich; Marco V. Natale; Sven O. Krumke (MEMSYS, 2016)

A new bank sensitive DRAMPower model for efficient design space exploration. - Matthias Jung 001; Deepak M. Mathew; Éder F. Zulian; Christian Weis; Norbert Wehn (PATMOS, 2016)

Using run-time reverse-engineering to optimize DRAM refresh. - Deepak M. Mathew; Éder F. Zulian; Matthias Jung 001; Kira Kraft; Christian Weis; Bruce L. Jacob; Norbert Wehn (MEMSYS, 2017)

A Bank-Wise DRAM Power Model for System Simulations. - Deepak M. Mathew; Éder F. Zulian; Subash Kannoth; Matthias Jung 001; Christian Weis; Norbert Wehn (RAPIDO, 2017)

A Platform to Analyze DDR3 DRAM's Power and Retention Time. - Matthias Jung 001; Deepak M. Mathew; Carl Christian Rheinländer; Christian Weis; Norbert Wehn (IEEE Des. Test, 2017)

Improving the error behavior of DRAM by exploiting its Z-channel property. - Kira Kraft; Chirag Sudarshan; Deepak M. Mathew; Christian Weis; Norbert Wehn; Matthias Jung 001 (DATE, 2018)

An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. - Deepak M. Mathew; Martin Schultheis; Carl Christian Rheinländer; Chirag Sudarshan; Christian Weis; Norbert Wehn; Matthias Jung 001 (DATE, 2018)

The Role of Memories in Transprecision Computing. - Christian Weis; Matthias Jung 001; Éder F. Zulian; Chirag Sudarshan; Deepak M. Mathew; Norbert Wehn (ISCAS, 2018)

Efficient coding scheme for DDR4 memory subsystems. - Kira Kraft; Deepak M. Mathew; Chirag Sudarshan; Matthias Jung 001; Christian Weis; Norbert Wehn; Florian Longnos (MEMSYS, 2018)

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM. - Deepak M. Mathew; André Lucas Chinazzo; Christian Weis; Matthias Jung 001; Bastien Giraud; Pascal Vivet; Alexandre Levisse; Norbert Wehn (SAMOS, 2019)

A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. - Chirag Sudarshan; Jan Lappas; Christian Weis; Deepak M. Mathew; Matthias Jung 001; Norbert Wehn (SAMOS, 2019)

An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices. - Deepak M. Mathew; Felipe S. Prado; Éder F. Zulian; Christian Weis; Muhammad Mohsin Ghaffar; Matthias Jung 001; Norbert Wehn (MEMSYS, 2020)

Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling. - Deepak M. Mathew; Hammam Kattan; Christian Weis; Jörg Henkel; Norbert Wehn; Hussam Amrouch (IEEE Access, 2021)

Advanced heterogeneous memory subsystems for energy-constrained computing = Fortgeschrittene heterogene Speichersubsysteme für Computersysteme mit limitiertem Energieverbrauch. - Deepak M. Mathew (2021)