Circuit techniques in a 266-MHz MMX-enabled processor. - Don Draper; Matt Crowley; John Holst; Greg Favor; Albrecht Schoy; Jeff Trull; Amos Ben-Meir; Rajesh Khanna; Dennis Wendell; Ravi Krishna; Joe Nolan; Dhiraj Mallick; et al. (IEEE J. Solid State Circuits, 1997)

A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor. - Hugh McIntyre; Dennis Wendell; K. James Lin; P. Kaushik; Suresh Seshadri; Alfred Wang; V. Sundararaman; Ping Wang; Song Kim; Wen-Jay Hsu; Hee-Choul Park; Gideon Levinsky; et al. (IEEE J. Solid State Circuits, 2005)