ONNC: A Compilation Framework Connecting ONNX to Proprietary Deep Learning Accelerators. - Wei-Fen Lin; Der-Yu Tsai; Luba Tang; Cheng-Tao Hsieh; Cheng-Yi Chou; Ping-Hao Chang; Luis Hsu (AICAS, 2019)

Fault-Tolerance Mechanism Analysis on NVDLA-Based Design Using Open Neural Network Compiler and Quantization Calibrator. - Shu-Ming Liu; Luba Tang; Ning-Chi Huang; Der-Yu Tsai; Ming-Xue Yang; Kai-Chiang Wu (VLSI-DAT, 2020)

Memory hot-zone and its application to accelerate the convergence of KSM for VM consolidation. - Chun-Yuan Huang; Der-Yu Tsai; Che-Rung Lee (UCC Companion, 2021)

ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design. - Samuel Liu; Jen-Ho Kuo; Luba Tang; Ning-Chi Huang; Der-Yu Tsai; M.-H. Yang; Kai-Chiang Wu (VLSI-DAT, 2021)

This is SPATEM! A Spatial-Temporal Optimization Framework for Efficient Inference on ReRAM-based CNN Accelerator. - Yen-Ting Tsou; Kuan-Hsun Chen; Chia-Lin Yang; Hsiang-Yun Cheng; Jian-Jia Chen; Der-Yu Tsai (ASP-DAC, 2022)