OSFA: a new paradigm of gate-sizing for power/performance optimizations under multiple operating conditions. - Subhendu Roy; Derong Liu 002; Junhyung Um; David Z. Pan (DAC, 2015)

TILA: Timing-Driven Incremental Layer Assignment. - Bei Yu 001; Derong Liu 002; Salim Chowdhury; David Z. Pan (ICCAD, 2015)

Incremental layer assignment for critical path timing. - Derong Liu 002; Bei Yu 001; Salim Chowdhury; David Z. Pan (DAC, 2016)

OSFA: A New Paradigm of Aging Aware Gate-Sizing for Power/Performance Optimizations Under Multiple Operating Conditions. - Subhendu Roy; Derong Liu 002; Jagmohan Singh; Junhyung Um; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Streak: Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups. - Derong Liu 002; Vinicius S. Livramento; Salim Chowdhury; Duo Ding; Huy Vo; Akshay Sharma; David Z. Pan (DAC, 2017)

Incremental Layer Assignment Driven by an External Signoff Timing Engine. - Vinicius S. Livramento; Derong Liu 002; Salim Chowdhury; Bei Yu 001; Xiaoqing Xu; David Z. Pan; José Luís Almada Güntzel; Luiz C. V. dos Santos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Incremental Layer Assignment for Timing Optimization. - Derong Liu 002; Bei Yu 001; Salim Chowdhury; David Z. Pan (ACM Trans. Design Autom. Electr. Syst., 2017)

OPERON: optical-electrical power-efficient route synthesis for on-chip signals. - Derong Liu 002; Zheng Zhao 003; Zheng Wang 036; Zhoufeng Ying; Ray T. Chen; David Z. Pan (DAC, 2018)

Prim-Dijkstra Revisited: Achieving Superior Timing-driven Routing Trees. - Charles J. Alpert; Wing-Kai Chow; Kwangsoo Han; Andrew B. Kahng; Zhuo Li 001; Derong Liu 002; Sriram Venkatesh (ISPD, 2018)

TILA-S: Timing-Driven Incremental Layer Assignment Avoiding Slew Violations. - Derong Liu 002; Bei Yu 001; Salim Chowdhury; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Hardware-software co-design of slimmed optical neural networks. - Zheng Zhao 003; Derong Liu 002; Meng Li 004; Zhoufeng Ying; Lu Zhang; Biying Xu; Bei Yu 001; Ray T. Chen; David Z. Pan (ASP-DAC, 2019)

Exploiting Wavelength Division Multiplexing for Optical Logic Synthesis. - Zheng Zhao 003; Derong Liu 002; Zhoufeng Ying; Biying Xu; Chenghao Feng; Ray T. Chen; David Z. Pan (DATE, 2019)

Device Layer-Aware Analytical Placement for Analog Circuits. - Biying Xu; Shaolan Li; Chak-Wa Pui; Derong Liu 002; Linxiao Shen; Yibo Lin; Nan Sun 001; David Z. Pan (ISPD, 2019)

Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups. - Derong Liu 002; Bei Yu 001; Vinicius S. Livramento; Salim Chowdhury; Duo Ding; Huy Vo; Akshay Sharma; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)