4D-CGRA: Introducing Branch Dimension to Spatio-Temporal Application Mapping on CGRAs. - Manupa Karunaratne; Dhananjaya Wijerathne; Tulika Mitra; Li-Shiuan Peh (ICCAD, 2019)

CASCADE: High Throughput Data Streaming via Decoupled Access-Execute CGRA. - Dhananjaya Wijerathne; Zhaoying Li; Manupa Karunarathne; Anuj Pathania; Tulika Mitra (ACM Trans. Embed. Comput. Syst., 2019)

HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction. - Dhananjaya Wijerathne; Zhaoying Li; Anuj Pathania; Tulika Mitra; Lothar Thiele (DATE, 2021)

REVAMP: a systematic framework for heterogeneous CGRA realization. - Thilini Kaushalya Bandara; Dhananjaya Wijerathne; Tulika Mitra; Li-Shiuan Peh (ASPLOS, 2022)

PANORAMA: divide-and-conquer approach for mapping complex loop kernels on CGRA. - Dhananjaya Wijerathne; Zhaoying Li; Thilini Kaushalya Bandara; Tulika Mitra (DAC, 2022)

LISA: Graph Neural Network based Portable Mapping on Spatial Accelerators. - Zhaoying Li; Dan Wu; Dhananjaya Wijerathne; Tulika Mitra (HPCA, 2022)

Power-Performance Characterization of TinyML Systems. - Yujie Zhang; Dhananjaya Wijerathne; Zhaoying Li; Tulika Mitra (ICCD, 2022)

ChordMap: Automated Mapping of Streaming Applications Onto CGRA. - Zhaoying Li; Dhananjaya Wijerathne; Xianzhang Chen; Anuj Pathania; Tulika Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

FLEX: Introducing FLEXible Execution on CGRA with Spatio-Temporal Vector Dataflow. - Thilini Kaushalya Bandara; Dan Wu; Rohan Juneja; Dhananjaya Wijerathne; Tulika Mitra; Li-Shiuan Peh (ICCAD, 2023)

Accelerating Edge AI with Morpher: An Integrated Design, Compilation and Simulation Framework for CGRAs. - Dhananjaya Wijerathne; Zhaoying Li; Tulika Mitra (CoRR, 2023)

ZeD: A Generalized Accelerator for Variably Sparse Matrix Computations in ML. - Pranav Dangi; Zhenyu Bai; Rohan Juneja; Dhananjaya Wijerathne; Tulika Mitra (PACT, 2024)

PACE: A Scalable and Energy Efficient CGRA in a RISC-V SoC for Edge Computing Applications. - Vishnu P. Nambiar; Yi Sheng Chong; Thilini Kaushalya Bandara; Dhananjaya Wijerathne; Zhaoying Li; Rohan Juneja; Li-Shiuan Peh; Tulika Mitra; Anh Tuan Do (HCS, 2024)

A 360 GOPS/W CGRA in a RISC-V SoC with Multi-Hop Routers and Idle-State Instructions for Edge Computing Applications. - Vishnu P. Nambiar; Y. S. Chong; Thilini Kaushalya Bandara; Dhananjaya Wijerathne; Z. Li; Rohan Juneja; Li-Shiuan Peh; Tulika Mitra; A. T. Do (ISOCC, 2024)

Rewire: Advancing CGRA Mapping Through a Consolidated Routing Paradigm. - Zhaoying Li; Dan Wu; Dhananjaya Wijerathne; Dan Chen 006; Huize Li; Cheng Tan 002; Tulika Mitra (DAC, 2025)

Data-aware Dynamic Execution of Irregular Workloads on Heterogeneous Systems. - Zhenyu Bai; Dan Wu; Pranav Dangi; Dhananjaya Wijerathne; Venkata Pavan Kumar Miriyala; Tulika Mitra (CoRR, 2025)

Building an Open CGRA Ecosystem for Agile Innovation. - Rohan Juneja; Pranav Dangi; Thilini Kaushalya Bandara; Zhaoying Li; Dhananjaya Wijerathne; Li-Shiuan Peh; Tulika Mitra (CoRR, 2025)