An implemented architecture of deblocking filter for H.264/AVC. - Bin Sheng; Wen Gao 001; Di Wu 022 (ICIP, 2004)

An Efficient Reference Frame Storage Scheme for H.264 HDTV Decoder. - Peng Zhang 018; Wen Gao 001; Di Wu 022; Don Xie (ICME, 2006)

A Motion Vector Predictor Architecture for AVS and MPEG-2 HDTV Decoder. - Junhao Zheng; Di Wu 022; Lei Deng 007; Don Xie; Wen Gao 001 (PCM, 2006)

Improved FFSBM Algorithm and Its VLSI Architecture for AVS Video Standard. - Li Zhang; Don Xie; Di Wu 022 (J. Comput. Sci. Technol., 2006)

An efficient VLSI architecture of VLD for AVS HDTV decoder. - Bin Sheng; Wen Gao 001; Don Xie; Di Wu 022 (IEEE Trans. Consumer Electron., 2006)

A flexible VLSI architecture of transport processor for an AVS HDTV decoder SoC. - Zhenrui Zhang; Di Wu 022; Peng Zhang 018; Don Xie; Wen Gao 001 (IEEE Trans. Consumer Electron., 2006)