Trading cache hit rate for memory performance. - Wei Ding 008; Mahmut T. Kandemir; Diana R. Guttman; Adwait Jog; Chita R. Das; Praveen Yedlapalli (PACT, 2014)

Quantifying and Optimizing the Impact of Victim Cache Line Selection in Manycore Systems. - Mahmut T. Kandemir; Wei Ding 008; Diana R. Guttman (MASCOTS, 2014)

Compiler Support for Optimizing Memory Bank-Level Parallelism. - Wei Ding 008; Diana R. Guttman; Mahmut T. Kandemir (MICRO, 2014)

Machine learning techniques for improved data prefetching. - Diana R. Guttman; Mahmut Taylan Kandemir; Meena Arunachalam; Rahul Khanna (ICEAC, 2015)

Performance and energy evaluation of data prefetching on intel Xeon Phi. - Diana R. Guttman; Mahmut T. Kandemir; Meenakshi Arunachalam; Vlad Calina (ISPASS, 2015)

Re-NUCA: A Practical NUCA Architecture for ReRAM Based Last-Level Caches. - Jagadish Kotra; Mohammad Arjomand; Diana R. Guttman; Mahmut T. Kandemir; Chita R. Das (IPDPS, 2016)

Quantifying the Potential Benefits of On-chip Near-Data Computing in Manycore Processors. - Jagadish B. Kotra; Diana R. Guttman; Nachiappan Chidambaram Nachiappan; Mahmut T. Kandemir; Chita R. Das (MASCOTS, 2017)

DEMM: A Dynamic Energy-Saving Mechanism for Multicore Memories. - Akbar Sharifi; Wei Ding 008; Diana R. Guttman; Hui Zhao 013; Xulong Tang; Mahmut T. Kandemir; Chita R. Das (MASCOTS, 2017)

Introducing Application Awareness Into a Unified Power Management Stack. - Daniel C. Wilson; Siddhartha Jana; Aniruddha Marathe; Stephanie Brink; Christopher M. Cantalupo; Diana R. Guttman; Brad Geltz; Lowren H. Lawson; Asma H. Al-Rawi; Ali Mohammad; Fuat Keceli; Federico Ardanaz; et al. (IPDPS, 2021)