Sub-pJ consumption and short latency time in RRAM arrays for high endurance applications. - Gilbert Sassine; Cecile Nail; Luc Tillie; Diego Alfaro Robayo; Alexandre Levisse; Carlo Cagli; Khalil El Hajjam; Jean-Francois Nodin; Elisa Vianello; Mathieu Bernard; Gabriel Molas; Etienne Nowak (IRPS, 2018)

Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization. - Joel Minguet Lopez; Lucas Hudeley; Laurent Grenouillet; Diego Alfaro Robayo; Jury Sandrini; Gabriele Navarro; Mathieu Bernard; Catherine Carabasse; Damien Deleruyelle; Niccolo Castellani; Marc Bocquet; Jean-Michel Portal; et al. (IRPS, 2021)