Markov Chain Models for Analyzing Memory Interference in Multiprocessor Computer Systems. - Dileep Bhandarkar; Samuel H. Fuller (ISCA, 1973)

A comparative evaluation of the cost effectiveness of computer systems (Paper Session). - Dileep P. Bhandarkar; J. Egil Juliussen (ACM Annual Conference, 1975)

Tutorial: Computer System Advantages of Magnetic Bubble Memories. - Dileep Bhandarkar; Egil Juliussen (Computer, 1975)

A practical application of memory interference models. - Dileep P. Bhandarkar (SIGMETRICS Perform. Evaluation Rev., 1975)

Analysis of Memory Interference in Multiprocessors. - Dileep Bhandarkar (IEEE Trans. Computers, 1975)

On the Performance of Magnetic Bubble Memories in Computer Systems. - Dileep Bhandarkar (IEEE Trans. Computers, 1975)

Some Performance Issues in Multiprocessor System Design. - Dileep Bhandarkar (IEEE Trans. Computers, 1977)

Semiconductor technology: trends and implications. - Dileep P. Bhandarkar; J. Egil Juliussen (SIGARCH Comput. Archit. News, 1978)

Special Feature the Impact Of Semiconductor Technology on Computer Systems. - Dileep Bhandarkar (Computer, 1979)

CCD Charge-Coupled Device Memories: A Perspective. - Dileep Bhandarkar; J. Brock Barton; A. F. Tasch Jr. (Computer, 1979)

VAX floating point: a solid foundation for numerical computation. - Mary Payne; Dileep Bhandarkar (SIGARCH Comput. Archit. News, 1980)

Design Trade-Offs in VAX-11 Translation Buffer Organization. - Mahadev Satyanarayanan; Dileep Bhandarkar (Computer, 1981)

Architecture Management for Ensuring Software Compatibility in the VAX Family of Computers. - Dileep Bhandarkar (Computer, 1982)

VAX 8800 System Overview. - Don McInnis; B. Kusik; Dileep Bhandarkar (COMPCON, 1987)

Vector extensions to the VAX architecture. - Dileep Bhandarkar; Richard Brunner (Compcon, 1990)

High performance issue oriented architecture. - Dileep Bhandarkar; David A. Orbits; Richard T. Witek; Wayne M. Cardoza; David N. Cutler (Compcon, 1990)

VAX Vector Architecture. - Dileep Bhandarkar; Richard Brunner (ISCA, 1990)

Performance From Architecture: Comparing a RISC and CISC with Similar Hardware Organization. - Dileep Bhandarkar; Douglas W. Clark (ASPLOS, 1991)

Characterization of Alpha AXP Performance Using TP and SPEC Workloads. - Zarka Cvetanovic; Dileep Bhandarkar (ISCA, 1994)

Alpha implementations and architecture - complete reference and guide. - Dileep Bhandarkar (Digital Press, 1996)

Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads. - Zarka Cvetanovic; Dileep Bhandarkar (HPCA, 1996)

Performance Characterization of the Pentium(r) Pro Processor. - Dileep Bhandarkar; Jianxun Jason Ding (HPCA, 1997)

RISC versus CISC: a tale of two chips. - Dileep Bhandarkar (SIGARCH Comput. Archit. News, 1997)

Parallelism in Mainstream Enterprise Platforms of the Future. - Dileep Bhandarkar (IEEE PACT, 2002)

Billion Transistor Chips in Mainstream Enterprise Platforms of the Future. - Dileep Bhandarkar (HPCA, 2003)

Performance analysis in the real world of on line services. - Dileep Bhandarkar (ISPASS, 2009)