A 328 μW 5 GHz voltage-controlled oscillator in 90 nm CMOS with high-quality thin-film post-processed inductor. - Dimitri Linten; Xiao Sun; Geert Carchon; Wutthinan Jeamsaksiri; Abdelkarim Mercha; Javier Ramos; Snezana Jenei; Lars Aspemyr; Andries J. Scholten; Piet Wambacq; Stefaan Decoutere; Stéphane Donnay; et al. (CICC, 2004)

Extended Subspace Identification of Improper Linear Systems. - Gerd Vandersteen; Rik Pintelon; Dimitri Linten; Stéphane Donnay (DATE, 2004)

RF ESD protection strategies - the design and performance trade-off challenges. - Philippe Jansen; Steven Thijs; Dimitri Linten; M. I. Natarajan; Vesselin K. Vassilev; Mingxu Liu; Ann Concannon; David Trémouilles; Takeshi Nakaie; Masanori Sawada; Vladislav A. Vashchenko; Marcel ter Beek; et al. (CICC, 2005)

Low-power low-noise highly ESD robust LNA, and VCO design using above-IC inductors. - Dimitri Linten; Xiao Sun; Steven Thijs; M. I. Natarajan; Abdelkarim Mercha; Geert Carchon; Piet Wambacq; Takeshi Nakaie; Stefaan Decoutere (CICC, 2005)

Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors. - Dimitri Linten; Xiao Sun; Geert Carchon; Wutthinan Jeamsaksiri; Abdelkarim Mercha; Javier Ramos; Snezana Jenei; Piet Wambacq; Morin Dehan; Lars Aspemyr; Andries J. Scholten; Stefaan Decoutere; et al. (IEEE J. Solid State Circuits, 2005)

A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS. - Dimitri Linten; Steven Thijs; Mahadeva Iyer Natarajan; Piet Wambacq; Wutthinan Jeamsaksiri; Javier Ramos; Abdelkarim Mercha; Snezana Jenei; Stéphane Donnay; Stefaan Decoutere (IEEE J. Solid State Circuits, 2005)

Implementation of plug-and-play ESD protection in 5.5GHz 90nm RF CMOS LNAs - Concepts, constraints and solutions. - Steven Thijs; M. Natarajan Iyer; Dimitri Linten; Wutthinan Jeamsaksiri; T. Daenen; Robin Degraeve; Andries J. Scholten; Stefaan Decoutere; Guido Groeseneken (Microelectron. Reliab., 2006)

An ESD-Protected DC-to-6GHz 9.7mW LNA in 90nm Digital CMOS. - Jonathan Borremans; Piet Wambacq; Dimitri Linten (ISSCC, 2007)

The Potential of FinFETs for Analog and RF Circuit Applications. - Piet Wambacq; Bob Verbruggen; Karen Scheir; Jonathan Borremans; Morin Dehan; Dimitri Linten; Vincent De Heyn; Geert Van der Plas; Abdelkarim Mercha; Bertrand Parvais; Cedric Gustin; Vaidyanathan Subramanian; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications. - Steven Thijs; Mototsugu Okushima; Jonathan Borremans; Philippe Jansen; Dimitri Linten; Mirko Scholz; Piet Wambacq; Guido Groeseneken (CICC, 2008)

Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies. - Piet Wambacq; Abdelkarim Mercha; Karen Scheir; Bob Verbruggen; Jonathan Borremans; Vincent De Heyn; Steven Thijs; Dimitri Linten; Geert Van der Plas; Bertrand Parvais; Morin Dehan; Stefaan Decoutere; et al. (ISSCC, 2008)

A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA. - Jonathan Borremans; Steven Thijs; Piet Wambacq; Yves Rolain; Dimitri Linten; Maarten Kuijk (IEEE J. Solid State Circuits, 2009)

A plug-and-play wideband RF circuit ESD protection methodology: T-diodes. - Dimitri Linten; Steven Thijs; Jonathan Borremans; Morin Dehan; David Trémouilles; Mirko Scholz; M. I. Natarajan; Piet Wambacq; Stefaan Decoutere; Guido Groeseneken (Microelectron. Reliab., 2009)

ESD On-Wafer Characterization: Is TLP Still the Right Measurement Tool? - Mirko Scholz; Dimitri Linten; Steven Thijs; Sandeep Sangameswaran; Masanori Sawada; Toshiyuki Nakaei; Takumi Hasebe; Guido Groeseneken (IEEE Trans. Instrum. Meas., 2009)

Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions. - Geert Van der Plas; Steven Thijs; Dimitri Linten; Guruprasad Katti; Paresh Limaye; Abdelkarim Mercha; Michele Stucchi; Herman Oprins; Bart Vandevelde; Nikolaos Minas; Miro Cupac; Morin Dehan; et al. (CICC, 2010)

Design issues and considerations for low-cost 3D TSV IC technology. - Geert Van der Plas; Paresh Limaye; Abdelkarim Mercha; Herman Oprins; Cristina Torregiani; Steven Thijs; Dimitri Linten; Michele Stucchi; Guruprasad Katti; Dimitrios Velenis; Domae Shinichi; Vladimir Cherman; et al. (ISSCC, 2010)

Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. - Geert Van der Plas; Paresh Limaye; Igor Loi; Abdelkarim Mercha; Herman Oprins; Cristina Torregiani; Steven Thijs; Dimitri Linten; Michele Stucchi; Guruprasad Katti; Dimitrios Velenis; Vladimir Cherman; et al. (IEEE J. Solid State Circuits, 2011)

Quasi-3D method: Time-efficient TCAD and mixed-mode simulations on finFET technologies. - Geert Hellings; Shih-Hung Chen; Dimitri Linten; Mirko Scholz; Guido Groeseneken (CICC, 2013)

Processing active devices on Si interposer and impact on cost. - Dimitrios Velenis; Mikael Detalle; Geert Hellings; Mirko Scholz; Erik Jan Marinissen; Geert Van der Plas; Antonio La Manna; Andy Miller; Dimitri Linten; Eric Beyne (3DIC, 2015)

Characterization and simulation methodology for time-dependent variability in advanced technologies. - Pieter Weckx; Ben Kaczer; Praveen Raghavan; Jacopo Franco; Marko Simicic; Philippe J. Roussel; Dimitri Linten; Aaron Thean; Diederik Verkest; Francky Catthoor; Guido Groeseneken (CICC, 2015)

The defect-centric perspective of device and circuit reliability - From individual defects to circuits. - Ben Kaczer; Jacopo Franco; Pieter Weckx; Philippe Roussel; Erik Bury; Moonju Cho; Robin Degraeve; Dimitri Linten; Guido Groeseneken; Halil Kukner; Praveen Raghavan; Francky Catthoor; et al. (ESSDERC, 2015)

ESD protection diodes in optical interposer technology. - Roman Boschke; Guido Groeseneken; Mirko Scholz; Shih-Hung Chen; Geert Hellings; Peter Verheyen; Dimitri Linten (ICICDT, 2015)

Off-state stress degradation mechanism on advanced p-MOSFETs. - Moonju Cho; Alessio Spessot; Ben Kaczer; Marc Aoulaiche; Romain Ritzenthaler; Tom Schram; Pierre Fazan; Naoto Horiguchi; Dimitri Linten (ICICDT, 2015)

Impact of local interconnects on ESD design. - Mirko Scholz; Shih-Hung Chen; Geert Hellings; Dimitri Linten; Roman Boschke (ICICDT, 2015)

ESD characterization of planar InGaAs devices. - Zhigang Ji; Dimitri Linten; Roman Boschke; Geert Hellings; S. H. Chen; AliReza Alian; D. Zhou; Yves Mols; Tsvetan Ivanov; Jacopo Franco; Ben Kaczer; X. Zhang; et al. (IRPS, 2015)

Active-lite interposer for 2.5 & 3D integration. - Geert Hellings; Mirko Scholz; Mikael Detalle; Dimitrios Velenis; Muriel de Potter de ten Broeck; C. Roda Neve; Y. Li; Stefaan Van Huylenbroeck; Shih-Hung Chen; Erik Jan Marinissen; Antonio La Manna; Geert Van der Plas; et al. (VLSIC, 2015)

Impact of on- and off-chip protection on the transient-induced latch-up sensitivity of CMOS IC. - Mirko Scholz; Shih-Hung Chen; Geert Hellings; Dimitri Linten (Microelectron. Reliab., 2016)

Tunable ESD clamp for high-voltage power I/O pins of a battery charge circuit in mobile applications. - Mirko Scholz; Geert Hellings; Shih-Hung Chen; Dimitri Linten (ESSDERC, 2017)

ESD characterisation of a-IGZO TFTs on Si and foil substrates. - Nian Wang 004; Shih-Hung Chen; Geert Hellings; Kris Myny; Soeren Steudel; Mirko Scholz; Roman Boschke; Dimitri Linten; Guido Groeseneken (ESSDERC, 2017)

A Physically Unclonable Function with 0% BER Using Soft Oxide Breakdown in 40nm CMOS. - Kai-Hsin Chuang; Erik Bury; Robin Degraeve; Ben Kaczer; Dimitri Linten; Ingrid Verbauwhede (A-SSCC, 2018)

Study of breakdown in STT-MRAM using ramped voltage stress and all-in-one maximum likelihood fit. - Simon Van Beek; Philippe Roussel; Barry J. O'Sullivan; Robin Degraeve; Stefan Cosemans; Dimitri Linten; Gouri Sankar Kar (ESSDERC, 2018)

Experimental extraction of BEOL composite equivalent thermal conductivities for application in self-heating simulations. - Erik Bury; Ben Kaczer; Simon Van Beek; Dimitri Linten (ESSDERC, 2018)

ESD diodes with Si/SiGe superlattice I/O finFET architecture in a vertically stacked horizontal nanowire technology. - Marko Simicic; Geert Hellings; Shih-Hung Chen; Naoto Horiguchi; Dimitri Linten (ESSDERC, 2018)

Self-heating-aware CMOS reliability characterization using degradation maps. - Erik Bury; Adrian Vaisman Chasin; Ben Kaczer; Kai-Hsin Chuang; Jacopo Franco; Marko Simicic; Pieter Weckx; Dimitri Linten (IRPS, 2018)

A multi-bit/cell PUF using analog breakdown positions in CMOS. - Kai-Hsin Chuang; Erik Bury; Robin Degraeve; Ben Kaczer; T. Kallstenius; Guido Groeseneken; Dimitri Linten; Ingrid Verbauwhede (IRPS, 2018)

Hot electron and hot hole induced degradation of SiGe p-FinFETs studied by degradation maps in the entire bias space. - Jacopo Franco; Ben Kaczer; Adrian Vaisman Chasin; Erik Bury; Dimitri Linten (IRPS, 2018)

Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown. - Barry J. O'Sullivan; Simon Van Beek; Philippe J. Roussel; Sidharth Rao; Wonsub Kim; S. Couet; Johan Swerts; Farrukh Yasin; Dimitri Crotti; Dimitri Linten; Gouri Sankar Kar (IRPS, 2018)

Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps. - Vamsi Putcha; Jacopo Franco; Abhitosh Vais; Ben Kaczer; S. Sioncke; Dimitri Linten; Guido Groeseneken (IRPS, 2018)

New methodology for modelling MOL TDDB coping with variability. - Philippe J. Roussel; Adrian Vaisman Chasin; Steven Demuynck; Naoto Horiguchi; Dimitri Linten; Anda Mocuta (IRPS, 2018)

A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability. - Ben Kaczer; Jacopo Franco; Pieter Weckx; Philippe Roussel; Vamsi Putcha; Erik Bury; Marko Simicic; Adrian Vaisman Chasin; Dimitri Linten; Bertrand Parvais; Francky Catthoor; Gerhard Rzepa; et al. (Microelectron. Reliab., 2018)

Comphy - A compact-physics framework for unified modeling of BTI. - Gerhard Rzepa; Jacopo Franco; Barry J. O'Sullivan; A. Subirats; Marko Simicic; Geert Hellings; Pieter Weckx; Markus Jech; Theresia Knobloch; Michael Waltl; Philippe Roussel; Dimitri Linten; et al. (Microelectron. Reliab., 2018)

A Cautionary Note When Looking for a Truly Reconfigurable Resistive RAM PUF. - Kai-Hsin Chuang; Robin Degraeve; Andrea Fantini; Guido Groeseneken; Dimitri Linten; Ingrid Verbauwhede (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018)

Stochastic Modeling of Hot-Carrier Degradation in nFinFETs Considering the Impact of Random Traps and Random Dopants. - Alexander Makarov; Dimitri Linten; Stanislav Tyaginov; Ben Kaczer; Philippe Roussel; Adrian Vaisman Chasin; Michiel Vandemaele; Geert Hellings; Al-Moatasem El-Sayed; Markus Jech; Tibor Grasser (ESSDERC, 2019)

Array-Based Statistical Characterization of CMOS Degradation Modes and Modeling of the Time-Dependent Variability Induced by Different Stress Patterns in the {VG, VD} bias space. - Erik Bury; Adrian Vaisman Chasin; Michiel Vandemaele; Simon Van Beek; Jacopo Franco; Ben Kaczer; Dimitri Linten (IRPS, 2019)

CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies. - Shih-Hung Chen; Dimitri Linten; Geert Hellings; Marko Simicic; Ben Kaczer; Thomas Chiarella; Hans Mertens; Jérôme Mitard; Anda Mocuta; N. Horiguchi (IRPS, 2019)

Concise Analytical Expression for Wunsch-Bell 1-D Pulsed Heating and Applications in ESD Using TLP. - Geert Hellings; Philippe Roussel; Nian Wang 004; Roman Boschke; Shih-Hung Chen; Marko Simicic; Mirko Scholz; Soeren Stoedel; Kris Myny; Dimitri Linten; Paul Hellings; Nowab Reza M. D. Ashif (IRPS, 2019)

New Insights into the Imprint Effect in FE-HfO2 and its Recovery. - Yusuke Higashi; Karine Florent; A. Subirats; Ben Kaczer; Luca Di Piazza; Sergiu Clima; Nicolo Ronchi; Sean R. C. McMitchell; Kaustuv Banerjee; Umberto Celano; Masamichi Suzuki; Dimitri Linten; et al. (IRPS, 2019)

Modeling the Effect of Random Dopants on Hot-Carrier Degradation in FinFETs. - Alexander Makarov; Ben Kaczer; Philippe Roussel; Adrian Vaisman Chasin; Alexander Grill; Michiel Vandemaele; Geert Hellings; Al-Moatasem El-Sayed; Tibor Grasser; Dimitri Linten; Stanislav Tyaginov (IRPS, 2019)

Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices. - Barry J. O'Sullivan; Romain Ritzenthaler; Gerhard Rzepa; Z. Wu; E. Dentoni Litta; O. Richard; T. Conard; V. Machkaoutsan; Pierre Fazan; C. Kim; Jacopo Franco; Ben Kaczer; et al. (IRPS, 2019)

Full (Vg, Vd) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETs. - Michiel Vandemaele; Ben Kaczer; Stanislav Tyaginov; Zlatan Stanojevic; Alexander Makarov; Adrian Vaisman Chasin; Erik Bury; Hans Mertens; Dimitri Linten; Guido Groeseneken (IRPS, 2019)

Accelerated Capture and Emission (ACE) Measurement Pattern for Efficient BTI Characterization and Modeling. - Zhicheng Wu; Jacopo Franco; Dieter Claes; Gerhard Rzepa; Philippe J. Roussel; Nadine Collaert; Guido Groeseneken; Dimitri Linten; Tibor Grasser; Ben Kaczer (IRPS, 2019)

A Physically Unclonable Function Using Soft Oxide Breakdown Featuring 0% Native BER and 51.8 fJ/bit in 40-nm CMOS. - Kai-Hsin Chuang; Erik Bury; Robin Degraeve; Ben Kaczer; Dimitri Linten; Ingrid Verbauwhede (IEEE J. Solid State Circuits, 2019)

Understanding and empirical fitting the breakdown of MgO in end-of-line annealed MTJs. - Simon Van Beek; Barry J. O'Sullivan; Sebastien Couet; Davide Crotti; Dimitri Linten; Gouri Sankar Kar (IRPS, 2020)

Relevance of fin dimensions and high-pressure anneals on hot-carrier degradation. - Adrian Vaisman Chasin; Jacopo Franco; Erik Bury; Romain Ritzenthaler; Eugenio Dentoni Litta; Alessio Spessot; Naoto Horiguchi; Dimitri Linten; Ben Kaczer (IRPS, 2020)

Reliability and Variability of Advanced CMOS Devices at Cryogenic Temperatures. - Alexander Grill; Erik Bury; Jakob Michl; Stanislav Tyaginov; Dimitri Linten; Tibor Grasser; Bertrand Parvais; Ben Kaczer; Michael Waltl; Iuliana P. Radu (IRPS, 2020)

On the impact of mechanical stress on gate oxide trapping. - Anastasiia Kruv; Ben Kaczer; Alexander Grill; Mario Gonzalez; Jacopo Franco; Dimitri Linten; Wolfgang Goes; Tibor Grasser; Ingrid De Wolf (IRPS, 2020)

Quantum Mechanical Charge Trap Modeling to Explain BTI at Cryogenic Temperatures. - Jakob Michl; Alexander Grill; Dieter Claes; Gerhard Rzepa; Ben Kaczer; Dimitri Linten; Iuliana P. Radu; Tibor Grasser; Michael Waltl (IRPS, 2020)

Fast & Accurate Methodology for Aging Incorporation in Circuits using Adaptive Waveform Splitting (AWS). - Subrat Mishra; Pieter Weckx; Ji-Yung Lin; Ben Kaczer; Dimitri Linten; Alessio Spessot; Francky Catthoor (IRPS, 2020)

Exploring the DC reliability metrics for scaled GaN-on-Si devices targeted for RF/5G applications. - Vamsi Putcha; Erik Bury; Jacopo Franco; Amey Walke; Simeng Zhao; Uthayasankaran Peralagu; Ming Zhao; AliReza Alian; Ben Kaczer; Niamh Waldron; Dimitri Linten; Bertrand Parvais; et al. (IRPS, 2020)

A Compact Physics Analytical Model for Hot-Carrier Degradation. - Stanislav Tyaginov; Alexander Grill; Michiel Vandemaele; Tibor Grasser; Geert Hellings; Alexander Makarov; Markus Jech; Dimitri Linten; Ben Kaczer (IRPS, 2020)

Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper. - Jacopo Franco; Hiroaki Arimura; J.-F. de Marneffe; A. Vandooren; L.-Å. Ragnarsson; Zhicheng Wu; Dieter Claes; E. Dentoni Litta; N. Horiguchi; Kris Croes; Dimitri Linten; Tibor Grasser; et al. (ICICDT, 2021)

On the impact of buffer and GaN-channel thickness on current dispersion for GaN-on-Si RF/mmWave devices. - Vamsi Putcha; Liang Cheng; AliReza Alian; Ming Zhao; Hai Lu; Bertrand Parvais; Niamh Waldron; Dimitri Linten; Nadine Collaert (IRPS, 2021)

Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies. - Gerhard Rzepa; Markus Karner; Oskar Baumgartner; Georg Strof; Franz Schanovsky; Ferdinand Mitterbauer; Christian Kernstock; Hui-Wen Karner; Pieter Weckx; Geert Hellings; Dieter Claes; Zhicheng Wu; et al. (IRPS, 2021)

Physics-based device aging modelling framework for accurate circuit reliability assessment. - Zhicheng Wu; Jacopo Franco; Brecht Truijen; Philippe Roussel; Stanislav Tyaginov; Michiel Vandemaele; Erik Bury; Guido Groeseneken; Dimitri Linten; Ben Kaczer (IRPS, 2021)

A BSIM-Based Predictive Hot-Carrier Aging Compact Model. - Yang Xiang; Stanislav Tyaginov; Michiel Vandemaele; Zhicheng Wu; Jacopo Franco; Erik Bury; Brecht Truijen; Bertrand Parvais; Dimitri Linten; Ben Kaczer (IRPS, 2021)

Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets. - Erik Bury; Adrian Vaisman Chasin; Ben Kaczer; Michiel Vandemaele; Stanislav Tyaginov; Jacopo Franco; Romain Ritzenthaler; Hans Mertens; Pieter Weckx; N. Horiguchi; Dimitri Linten (IRPS, 2022)

Enabling Active Backside Technology for ESD and LU Reliability in DTCO/STCO. - Kateryna Serbulova; S.-H. Chen; Geert Hellings; Anabela Veloso; Anne Jourdain; Dimitri Linten; Jo De Boeck; Guido Groeseneken; Julien Ryckaert; Geert Van der Plas; Eric Beyne; Eugenio Dentoni Litta; et al. (VLSI Technology and Circuits, 2022)

Reliability challenges in Forksheet Devices: (Invited Paper). - Erik Bury; Michiel Vandemaele; Jacopo Franco; Adrian Chasin; Stanislav Tyaginov; A. Vandooren; Romain Ritzenthaler; Hans Mertens; Javier Diaz-Fortuny; N. Horiguchi; Dimitri Linten; Ben Kaczer (IRPS, 2023)

A Pragmatic Model to Predict Future Device Aging. - James Brown; Kean Hong Tok; Rui Gao 003; Zhigang Ji; Weidong Zhang 002; John S. Marsland; Thomas Chiarella; Jacopo Franco; Ben Kaczer; Dimitri Linten; Jianfu Zhang 001 (IEEE Access, 2023)