Uniform area timing-driven circuit implementation. - Dimitrios Karayiannis; Spyros Tragoudas (Great Lakes Symposium on VLSI, 1995)

ATPD: An Automatic Test Pattern Generator for Path Delay Faults. - Dimitrios Karayiannis; Spyros Tragoudas (ITC, 1996)

Nonenumerative Path Delay Fault Coverage Estimation with Optimal Algorithms. - Dimitrios Kagaris; Spyros Tragoudas; Dimitrios Karayiannis (ICCD, 1997)

Implementing and clustering modules with complex delays. - Spyros Tragoudas; Dimitrios Karayiannis (Integr., 1997)

Improved nonenumerative path-delay fault-coverage estimation based on optimal polynomial-time algorithms. - Dimitrios Kagaris; Spyros Tragoudas; Dimitrios Karayiannis (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997)

A Nonenumerative ATPG for Functionally Sensitizable Path Delay Faults. - Dimitrios Karayiannis; Spyros Tragoudas (VTS, 1998)

Clustering Network Modules with Different Implementations for Delay Minimization. - Dimitrios Karayiannis; Spyros Tragoudas (VLSI Design, 1998)

Timing-Driven Circuit Implementation. - Dimitrios Karayiannis; Spyros Tragoudas (VLSI Design, 1998)

A fast nonenumerative automatic test pattern generator for pathdelay faults. - Spyros Tragoudas; Dimitrios Karayiannis (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)